Deepak Murugan Email & Phone Number

Bengaluru, Karnataka, India

Erfurt Area, Germany

To design a low phase noise and optimized power voltage controlled oscillator for a GPS/Galileo receiver. A schematic level LC VCO with a new topology of LC tank called Double Harmonic Tuned tank to lower the phase noise of VCO was designed. The design was carried out in lf150 technology for a frequency of 1.5 GHz, with a power consumption of 5 mW and a.

Design, simulate and fabricate full custom High Speed Serial Link Transceiver chip in 0.35 µm CMOS technology using Cadence Virtuoso. It follows the complete design flow from high-level behavioral model to chip fabrication and evaluation. Throughout the design process stress was given on completion of project in the given time and achieving higher data.

Size ­ 6 MembersDesign, simulate and fabricate full custom High Speed Serial Link Transceiver chip in0.35 µm CMOS technology using Cadence Virtuoso. It follows the complete design flowfrom high-level behavioral model to chip fabrication and evaluation. Throughout thedesign process stress was given on completion of project in the given time and.

Doctorate, Remote Sensing And Image Processing

Electrical Engineering, Communication Electronics

Education record

Final Project: Face Recognition using WMPCA 70% aggregate