Dilip P. Email and Phone Number
Dilip P. personal email
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Seasoned high-tech industry leader with over 20 years of expertise in high-volume manufacturing and R&D. Proven track record of leading global multi-company VP-level teams of 35+, managing $4M annual budgets and fostering collaborations with 50+ global suppliers across 20+ equipment types. Adept at driving initiatives in material procurement, supply chain optimization, defect reduction, and equipment productivity for industry leaders like TSMC, Samsung, AMD and INTEL Demonstrated success in achieving 6-10x ROI for clients and saving consortium member companies up to $30M annually through strategic initiatives.SKILLS• Strategic Leadership: Supply chain management, Road mapping, International alliances• Lean Six Sigma, DMAIC, Agile, Waterfall, PMP certificate course, MS Project, SharePoint• Technical Proficiency: DOE, SPC, FMEA, 8-D, 5S, data analysis, JMPINDUSTRY ASSOCIATION & INFLUENCE• Co-chair, Yield Enhancement chapter, International Technology Roadmap for Semiconductors (ITRS), 2004-2013• Invited speaker at conferences including SPIE Microlithography, Advanced Semiconductor Manufacturing Conference (ASMC), International Symposium on Semiconductor Manufacturing (Japan), and SEMICON - West, Korea, China, and Europe), i-SEDEX: South KoreaEDUCATION• Master's in Manufacturing / Industrial Engineering• Bachelor's in Mechanical EngineeringEDUCATION• Master's in Manufacturing / Industrial Engineering• Bachelor's in Mechanical Engineering
Northeastern Association Of The Blind At Albany (Naba)
View- Website:
- naba-vision.org
- Employees:
- 29
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Leader - Operations And ManufacturingNortheastern Association Of The Blind At Albany (Naba)Latham, Ny, Us -
Volunteer / Consultant | Manufacturing Operations & Process ImprovementNortheastern Association Of The Blind At Albany (Naba) Oct 2024 - PresentAlbany, New York, United States- Conceptualize and formulate strategic initiatives that further the mission and vision of NABA while ensuring the day-to-day activities of the organization support those initiatives. -
Technical ConsultantEx Intel Corporation Nov 2014 - Oct 2024
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Program ManagerSuny Poly Sematech Oct 2011 - Apr 2014Albany, Ny• Led four global cross-functional teams of 16-35 professionals, ranging from engineers to VP-level managers from major chipmakers including Intel, AMD, TSMC, and Samsung, driving initiatives in supply chain optimization, yield enhancement, and equipment productivity.• Spearheaded an industry task force identifying the root cause of an AnHCl excursion at an early stage, potentially preventing multi-company factory shutdowns in the US.• Delivered market outlook reports on key semiconductor materials (e.g., electronic gases, wet chemicals, photoresists, CMP slurries) while benchmarking key procurement metrics and best practices.• Orchestrated a helium conservation initiative during the 2012 global shortage, achieving 25-35% usage reduction through benchmarking and waste elimination, saving members up to $30M annually.• Enabled SEMATECH member companies to establish new partnerships with 12 materials suppliers in Asia for alternate and second sourcing by cultivating C-level relationships.• Achieved 6-10x ROI for SEMATECH's Critical Materials Council while doubling the membership and revenue in two-years.• Invited speaker at international semiconductor conferences, including i-SEDEX in Korea (2013) on “Process materials outlook and challenges at 14nm technology nodes”. -
Engineering Program ManagerSuny Poly Sematech Oct 2009 - Dec 2012Albany, Ny• Led $4M program, directing 14-member engineering team to enhance semiconductor capital equipment capabilities for next-generation technology nodes.• Managed collaborations with 30+ global suppliers, research labs, and universities, overseeing 20+ equipment types spanning Defect, Lithography, and Films metrology domains.• Forged strategic supplier partnership, leading to installation of multi-million-dollar advanced material characterization tool at SEMATECH/CNSE fabrication facility.• Led development of industry's first sub-12nm defect standard vehicles, in collaboration with IMEC (Belgium), enabling evaluation of next-generation inspection equipment.• Co-chaired Yield Enhancement chapter of International Technology Roadmap for Semiconductors (ITRS), fostering collaborations and guiding industry ecosystem to develop yield-driving solutions.• Recruited and promoted by SEMATECH at the end of Intel assignment to manage an expanded Metrology project portfolio. -
Project Manager (Intel Assignee)Suny Poly Sematech Jan 2004 - Sep 2009Austin, Tx• Led diverse portfolio of projects from the conception to the delivery addressing technical challenges for defect inspection, review, and characterization equipment used in high-volume manufacturing.• Rebuilt technical program engaging member company stakeholders, persuading tier 1 OEM suppliers (e.g. KLA, Applied Materials, and Hitachi) for collaborations and streamlining program focus areas to address critical gaps. • Recruited and developed diverse engineering team, growing from 1 to 7 members, including interns, postdocs, and assignees from Samsung, Toshiba, IBM, and TI.• Led software development for dynamic sampling in high-product mix manufacturing; co-secured two NSF grants in partnership with a startup.• Promoted at INTEL during assignment at SEMATECH, an atypical achievement. -
Sr. Engineer & Manager: Equipment/ Process / ManufacturingIntel Corporation Sep 1994 - Dec 2003Fab 11X, Nm & Santa Clara, Ca• Led equipment engineering, process improvement, and yield optimization initiatives across multiple technology generations, driving efficiency and quality enhancements in high-volume manufacturing. • Managed 16-member team comprised of engineers and technicians overseeing defect inspection, reduction, and yield improvement in 24/7 high-volume manufacturing.• Led cross-functional task forces to resolve yield excursions, conducting DOEs with process engineering teams across lithography, deposition, etching, and cleaning operations.• Spearheaded transition to 300mm wafer size for metrology, developed specs and test metrics for 5 tool types, executed demonstrations and drove supplier tool development roadmaps.• Led supplier improvement initiative: reduced backside wafer contamination by 75%, resolved level 2 safety issues, and boosted automation compliance from 46% to 74%; persuaded tier 2 supplier to implement company-wide equipment reliability program. Earned Intel's Divisional Recognition Award.• Chaired cross-site KLA teams: Implemented TPM and new qualification methods, improving tool matching 12% and OEE 4%. Internalized level 2 & 3 AIT tool PM, training technicians and reducing annual service costs ~15%.• Implemented fab-wide equipment calibration system, reducing process equipment downtime and yield excursions 5-10%; led Fab 9's successful ISO 9001 certification process.
Dilip P. Skills
Dilip P. Education Details
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Master'S In Integrated Manufacturing Systems Engineering -
Mechanical Engineering -
B And B Institute Of TechnologyMechanical Engineering
Frequently Asked Questions about Dilip P.
What company does Dilip P. work for?
Dilip P. works for Northeastern Association Of The Blind At Albany (Naba)
What is Dilip P.'s role at the current company?
Dilip P.'s current role is Leader - Operations and Manufacturing.
What is Dilip P.'s email address?
Dilip P.'s email address is rr****@****hoo.com
What schools did Dilip P. attend?
Dilip P. attended North Carolina State University, Birla Vishvakarma Mahavidyalaya, B And B Institute Of Technology.
What skills is Dilip P. known for?
Dilip P. has skills like Program Management, Lean Manufacturing, Yield Management, Defect Identification, Defect Elimination, Materials Management, Capital Equipment, Supply Chain Management, Team Leadership, Project Management, Ms Project, Six Sigma.
Not the Dilip P. you were looking for?
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Dilip Kumar, M.A.Sc., P.Eng.
Houston, Tx1gmail.com
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