Dilip P. Email & Phone Number

Latham, NY, US

Albany, New York, United States

- Conceptualize and formulate strategic initiatives that further the mission and vision of NABA while ensuring the day-to-day activities of the organization support those initiatives.

Albany, NY

• Led four global cross-functional teams of 16-35 professionals, ranging from engineers to VP-level managers from major chipmakers including Intel, AMD, TSMC, and Samsung, driving initiatives in supply chain.
• Spearheaded an industry task force identifying the root cause of an AnHCl excursion at an early stage, potentially preventing multi-company factory shutdowns in the US.
• Delivered market outlook reports on key semiconductor materials (e.g., electronic gases, wet chemicals, photoresists, CMP slurries) while benchmarking key procurement metrics and best practices.
• Orchestrated a helium conservation initiative during the 2012 global shortage, achieving 25-35% usage reduction through benchmarking and waste elimination, saving members up to $30M annually.
• Enabled SEMATECH member companies to establish new partnerships with 12 materials suppliers in Asia for alternate and second sourcing by cultivating C-level relationships.
• Achieved 6-10x ROI for SEMATECH's Critical Materials Council while doubling the membership and revenue in two-years.

Albany, NY

• Led $4M program, directing 14-member engineering team to enhance semiconductor capital equipment capabilities for next-generation technology nodes.
• Managed collaborations with 30+ global suppliers, research labs, and universities, overseeing 20+ equipment types spanning Defect, Lithography, and Films metrology domains.
• Forged strategic supplier partnership, leading to installation of multi-million-dollar advanced material characterization tool at SEMATECH/CNSE fabrication facility.
• Led development of industry's first sub-12nm defect standard vehicles, in collaboration with IMEC (Belgium), enabling evaluation of next-generation inspection equipment.
• Co-chaired Yield Enhancement chapter of International Technology Roadmap for Semiconductors (ITRS), fostering collaborations and guiding industry ecosystem to develop yield-driving solutions.
• Recruited and promoted by SEMATECH at the end of Intel assignment to manage an expanded Metrology project portfolio.

Austin, TX

• Led diverse portfolio of projects from the conception to the delivery addressing technical challenges for defect inspection, review, and characterization equipment used in high-volume manufacturing.
• Rebuilt technical program engaging member company stakeholders, persuading tier 1 OEM suppliers (e.g. KLA, Applied Materials, and Hitachi) for collaborations and streamlining program focus areas to address critical gaps.
• Recruited and developed diverse engineering team, growing from 1 to 7 members, including interns, postdocs, and assignees from Samsung, Toshiba, IBM, and TI.
• Led software development for dynamic sampling in high-product mix manufacturing; co-secured two NSF grants in partnership with a startup.
• Promoted at INTEL during assignment at SEMATECH, an atypical achievement.

Fab 11x, NM & Santa Clara, CA

• Led equipment engineering, process improvement, and yield optimization initiatives across multiple technology generations, driving efficiency and quality enhancements in high-volume manufacturing.
• Managed 16-member team comprised of engineers and technicians overseeing defect inspection, reduction, and yield improvement in 24/7 high-volume manufacturing.
• Led cross-functional task forces to resolve yield excursions, conducting DOEs with process engineering teams across lithography, deposition, etching, and cleaning operations.
• Spearheaded transition to 300mm wafer size for metrology, developed specs and test metrics for 5 tool types, executed demonstrations and drove supplier tool development roadmaps.
• Led supplier improvement initiative: reduced backside wafer contamination by 75%, resolved level 2 safety issues, and boosted automation compliance from 46% to 74%; persuaded tier 2 supplier to implement company-wide.
• Chaired cross-site KLA teams: Implemented TPM and new qualification methods, improving tool matching 12% and OEE 4%. Internalized level 2 & 3 AIT tool PM, training technicians and reducing annual service costs ~15%.

Master'S In Integrated Manufacturing Systems Engineering

Activities and Societies: Graduate Research Assistant (9/92 – 5/94) Design and development of automated material handling system (AMHS).

Bachelor Of Engineering, Mechanical Engineering

Activities and Societies: Sardar Patel University (Anand, India}

Diploma, Mechanical Engineering

Activities and Societies: 3rd rank at the state-level (exam conducted by Technical Education Board of Gujarat)