With over a decade of combined hands-on experience in both industrial and research settings, I specialize in FPGA-based product development, hardware accelerator design, custom IP development and digital IC design. I spearheaded the RISC-V and Digital Integrated-Circuit (IC) design initiatives at the NUST School of Electrical Engineering and Computer Science (SEECS) in Pakistan, culminating in the successful design of a silicon-proven RISC-V based Embedded Microprocessor using TSMC’s 65nm technology node. Currently, as the Director of Hardware Engineering at DreamBig Semiconductor, I lead dynamic, globally distributed teams, including those in Silicon Valley, CA, focusing on the front-end and physical design of Chiplet-based NextGen SMARTNIC/DPU.