Dustin Robinson Email and Phone Number

Objective: Bringing new 3D DRAM memory technologies to market.Focus: HVM and Bench test environments for direct device characterization and analysis.Key Responsibilities:Cross-functional Collaboration: Partnered with process integration, DFT, and probe teams, accelerating the market introduction of new DRAM memories.Direct Device Test Development: Developed and implemented specialized test flows for TFT and DRAM Cell characterization and developed methods for increasing accuracy.Process and Circuit Evaluation: Conducted thorough evaluations of new process and circuit designs, ensuring high-quality silicon outcomes.Continuous Learning: Stayed up-to-date with 3D DRAM process integration, sparking new ideas in functionality, operation, and fabrication.Array Characterization: Developed, documented, and performed array characterization, improving the reliability and performance of memory technologies.Skills:Data Analysis: Proficient in analyzing complex datasets to derive actionable insights.Programming: Skilled in Python and C++ for data crunching and embedded test development.Statistical Analysis: Experienced with JMP for statistical data analysis.Semiconductors: In-depth knowledge of semiconductor technologies.Failure Analysis: Expertise in electrical failure analysis.Leadership: Practicing servant leadership to foster team growth and collaboration.

Objective: Accelerate the market introduction of emerging memory technologies.Focus: Lead process development and defect characterization for Fe-DRAM memory technologies.Key Responsibilities:Cross-functional Collaboration: Partnered with process integration, yield enhancement, and probe teams, driving new memory technologies to market.Custom Test Development: Created and implemented custom test flows, enhancing intrinsic device characterization.Process and Circuit Evaluation: Conducted thorough evaluations of new process and circuit designs, ensuring high-quality silicon outcomes.Continuous Learning: Stayed updated on emerging memory structures, fostering innovation in functionality, operation, and fabrication processes.Array Characterization: Developed, documented, and performed array characterization, improving product reliability.

Product development for an emerging memory.

DRAM Product EngineerFocused on driving yield improvements in semiconductor manufacturing by detecting and quantifying yield-limiting defects and process anomalies using Electrical Failure Characterization and statistical data analysis. Experienced with 30nm, 20nm, 1Xnm, 1Ynm, and 1Znm DRAM.Yield Optimization: Enhanced semiconductor yield by identifying and addressing yield-limiting defects and process anomalies.Defect Characterization: Conducted lab bench testing to electrically characterize defects, improving product reliability.Data Analysis: Analyzed large datasets to identify trends and correlations, leading to actionable insights.Cross-functional Collaboration: Worked with Fab, Product Engineering, and Business Units to report findings, enhancing yield and reliability.

My primary experiences included introducing and engaging middle school and high school students in the Science, Technology, Engineering and Mathematics (STEM) fields in an effort to drive early interest in higher education STEM degrees. Responsibilities included developing and teaching extracurricular courses that include engineering and mathematics principals in fun and exciting experiments or robotics.

My primary goal was to engage with clients to educated and empower financial success. My primary tasks included facilitating time sensitive equity trading and asset reallocation, guiding investment decisions and demonstrating financial tools.