Erin Mcdonnell Email & Phone Number

Washington, DC, US

Waukesha, Wisconsin, United States

• Focused on subsystem cost reduction while maintaining image quality and improving the patient experience
• Driving innovation as FPGA owner across all receive modules by implementing a new high-speed ADC for sampling MR data, developing a control interface and signal-processing data path for the new Contactless Gating.
• Leveraging opportunities for continuous improvement throughout the subsystem by solving a field issue with the flash boot sequence, securing an intern to migrate FIFO, RAM, and ROM FPGA IP from Quartus 4 to Quartus.

Waukesha, Wisconsin, United States

• Implementing new design architecture for MR patient table to improve accessibility and enable future innovation
• Leveraged SMEs on and off the Patient Experience team to define key requirements of the PHSC digital design including FPGA selection, memory selection, clock distribution, FPGA boot sequence, flash memory map, and.
• Emulated the PHSC/PHTC hardware environment using an Arria10GX development kit with a new FPGA image to expedite technical risk mitigation and firmware integration.
• Captured the digital design architecture and key design decisions in rev-controlled documentation in MWS including the PHSC HDD and a first draft of the PHSC PDL.

Waukesha, Wisconsin, United States

• Reducing cost of the detector and increasing supply chain flexibility during COVID by designing for both Lattice and Intel FPGAs
• Designed and executed plan for evaluating flash boot strategy using Lattice development tools and a hardware testing setup
• Investigated the boot time, clock/data alignment, and failure modes of each flash boot option, and developed a recommendation based on the results
• Conducted signal integrity and timing analysis tests to verify interface reliability and support development of better clocks on the Lattice FPGAs
• Enabled dual sourcing of FPGAs between Intel and Lattice by implementing a flash interface in VHDL on a Lattice FPGA

Waukesha, Wisconsin, United States

• Developing new subsystem architecture in order to increase flexibility and enable new features
• Created a platform solution for two products using different versions of the same FPGA image by studying the legacy VHDL code, identifying key differences, and developing a strategy for merging to one image
• Designed a SPI Engine to facilitate communication between a vCPLD in an FPGA and a DRA821 processor. SPI Engine supported read operations, write operations, and clock domain crossing between the 48MHz Processor clock.
• Implemented the SPI Engine in VHDL and simulated in QuestaSim, culminating in a self-checking testcase running regression

Waukesha, Wisconsin, United States

• Led the Bali-A N2W combined SW RFV by holding daily sync-ups and tracking actions in an RFV checklist to ensure the RFV was signed off on time
• Verified all the new datasheet claims for the Signa Hero 510k submission were substantiated by comparing the Signa Hero requirements to the most recent product and testing to verify the new datasheet claims
• Supported the Bali-A revised FDR1 by tagging requirements in DOORs, tracking documents in the RFV tracker, and collaborating with the extended program team to ensure all documentation was prepared on time

Waukesha, Wisconsin, United States

• As an EEDP intern on the MR Beyond Hardware Team, I
• Collaborated virtually with cross-functional team to improve patient experience inside PETMR scanner
• Reviewed existing pcb design and interfacing circuitry, worked in cadence to identify compatible footprint options, and leveraged supplier relationships to identify potential solutions
• Delivered proof-of-concept design and associated system evaluation for increasing brightness inside the bore
• Supported regulatory needs of the business by collecting RoHs compliance evidence from multiple vendors

Waukesha, WI

• As an EEDP Intern on the 7T Beyond Hardware Team, I
• Delivered narrow band exciter prototypes to the 7T Signa product line in support of system verification activities; work included qualifying the prototypes in a bench and MR simulation environment using RF equipment.
• Designed a common, reusable, programmable hardware engine for Serial Peripheral Interface (SPI) communications between FPGAs and other chips in the 7T Signa system; implemented in VHDL and tested with both Simulation.
• Leveraged RF skills to develop test specifications for the coil and RF board elements for the 7T Signa Eddy Current measurement tool. Also created design output documentation in MyWorkshop to enable supplier engagement

West Lafayette, Indiana

• As a teaching assistant for Introduction to Professional Practice in Engineering, I
• Prepared First Year Engineering students for success in any career field by providing them with professional development resources and opportunities
• Fostered an educational and interactive classroom by encouraging students to share their thoughts with the class and learn from each other's experiences

Indianapolis, Indiana Area

• As a Project Manager, I contributed the following:
• Built and delivered a semester's worth of HTML, CSS, and JavaScript curriculum that engages all learning styles and can be taught by any teacher (regardless of background) by leading a team of 4 individuals through the.
• Iterated curriculum (including coding, logic design, hands-on, STEM career, and internet safety activities) based on customer feedback from pilot classes conducted with different students, teachers, and organizations
• Standardized the curriculum writing procedure throughout the company to ensure product excellence and consistency during the product development cycle

West Lafayette, IN

• As an Undergraduate Research Assistant I completed the following:
• Collaborated with graduate researchers to create a multimodal sensory substitution (aka a haptic device) that enables blind or visually impaired individuals to perceive images through sensors other than vision
• Developed a program to improve the haptic device's machine learning thereby enhancing the user's experience
• Improved the accessibility of the haptic device by making it compatible with android and iOS

Fishers, IN

• As an intern I completed the following projects:
• Designed a process automation program in Excel VBA to organize a database of medical conference information for an internationally recognized company that resulted in an increase in employee efficiency
• Leveraged the strength of technology and data to create robust solutions
• Performed IT tasks and repaired technology for small businesses
• Designed, built, and managed websites in WordPress for small businesses

Master Of Science - Ms, Electrical And Computer Engineering, 4.0

Relevant Coursework: Digital Signal Processing, Multirate Signal Processing, FPGA Design using VHDL (Nexys development board with Xilinx.

Bachelor Of Science - Bs, Electrical Engineering, 3.55

Activities and Societies: Society of Women Engineers: 2018 - 2019 Senior Sneak-Peek Co-Chair, Women in Engineering at Purdue I2D2.