Eric Petit Email & Phone Number

Santa Clara, California, Us

Our group is in charge to explore and leverage upcoming Intel architectures improvements or new designs to accelerate and extend the capabilities of Intel software targeting developers (mainly libraries, compiler, perf tools). Our goal is to unleash the full potential computing power of future Intel systems for our customers application. Since 2021, my primary research has shifted to focus on leveraging AI/ML for code generation and code optimization. With the recent breakthrough in AI, there are endless opportunities to improve our software products. I am currently lead architect of two research projects aiming at improving numerical libraries performance and productivity in development. I am also AI expert for the group, providing consultancy and help on various project across the organization.

Santa Clara, California, Us

In may 2020 I joined the Math Library Pathfinding group at Intel to continue my research on computer arithmetic. My primary research focus was on numerical portability, numerical stability, and mixed precision.

Santa Clara, California, Us

In the context of the Exascale computing research Lab (Intel, CEA, UVSQ), my research focuses on preparing HPC applications for future exascale many-core systems. My current interests are in numerical reproducibility and parallel programming models, algorithms and runtimes. My main objective is to engage collaboration with leadership class HPC application developers and reveal the potential of their codes for the future Intel architectures.

Versailles, Île-De-France, Fr

My research work are on preparing HPC applications for future exascale many-core systems. I focus on the concurrency and locality characterization and optimization, and application-architecture co-design. My current interests are in new parallelisation strategies based on innovative runtime environment and auto-tuning frameworks. 2014 -2017, leading the UVSQ contribution in the COLOC itea2 European project (coordinator Atos-Bull) proposing : tools and metrics for characterizing the application concurrency and locality, an application model, programming strategy for industrial HPC use cases. 2013-2016 EXA2CT FP7 European project, work package leader of the Programming models and run-time support for extreme scaling. We develop generic approaches for efficient and resilient hybrid programming on heterogeneous architectures with GPI/GASPI/Shark (PGAS) and task parallel models (CIlk, openMP). We tested and evaluate programming models and runtimes with specific solvers and proto-apps extracted from real full-scale applications. 2011-2013: Leading the UVSQ participation in the H4H ITEA2 European project (coordinator Atos-Bull). Our main focus was on performance measurement, performance prediction, auto-tuning, and parallelization strategies for many-core programming.

Perpignan, Fr

ILP, Perpi tool, Computer arithmetic, Numerical precision, Parallel programing, HPC

Le Chesnay Cedex, France, Fr

compiler, parallel programing model, many-core, hybrid system, gpgpu, MPSoC, ASTEX, HMPP