Erik Woods Email and Phone Number
Phoenix, AZ, US
Erik Woods's Location
Greater Phoenix Area, United States, United States
Erik Woods's Contact Details
Erik Woods work email
- Valid
- Valid
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Erik Woods personal email
n/a
About Erik Woods
Erik Woods is a Principal Wafer Fab Process Engineer at Medtronic at Medtronic. He possess expertise in semiconductors, semiconductor industry, spc, design of experiments, failure analysis and 20 more skills.
Erik Woods's Current Company Details
Medtronic
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Principal Wafer Fab Process Engineer at Medtronic
Phoenix, AZ, US
- Website:
- medtronic.com
- Employees:
- 97718
Erik Woods Work Experience Details
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MedtronicPhoenix, Az, Us
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Principal Wafer Fab Process EngineerMedtronic Jan 2021 - PresentMinneapolis, Mn, Us
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Senior Process EngineerAxus Technology Jun 2019 - Dec 2020Chandler, Arizona, Us -
Senior Manufacturing Process EngineerKaterra Oct 2017 - Mar 2019Menlo Park, Ca, UsSenior engineer responsible for developing and sustaining manufacturing processes of offsite construction of multi-family residences. Responsible for all phases of manufacturing of wall panels, floor trusses and floor panels including factory layout, equipment selection, equipment qualification, process development and day to day sustaining of operations on the factory floor. Key accomplishments:• Managed cross functional team including vendor field service engineers, facilities technicians, and maintenance technicians on the installation of an automated floor panel machine including Factory Acceptance Testing (FAT), creating process specifications, creating Preventative Maintenance (PM) documentation and schedules, and troubleshooting guides.• Utilized kaizen events and continuous improvement projects to double floor panel production by using lean manufacturing techniques• Managed team of facilities technicians, maintenance technicians, and process engineers on a major layout change to the wall panel manufacturing line including adding additional machines to increase capability by 50% and increase capacity 30% while managing schedules with plant operations to limit impact to factory output.• Increased floor truss final quality yields from 50% to over 90% by performing deep-dive root cause analysis into failures and designing jigs and providing training for production operators -
Senior Process Development EngineerCompound Photonics Aug 2015 - Oct 2017Chandler, Arizona, UsSenior engineer responsible for development and manufacturing of Liquid Crystal on Silicon (LcoS) displays. Process responsibilities include leading process development of wafer and glass cleans, Si to glass bonding, LC fill and wire bonding packaged parts. Manufacturing responsibilities include wafer starts, line balance/management, scrap investigations and EOL yield analysis. Other tasks include creating process documentation, specifications and procedure writing, and training of technicians and operators. -
Process Manufacturing EngineerFreescale Semiconductor Mar 2006 - Aug 2015Austin, Texas, UsSenior level process engineer with responsibilities ranging from pre-diffusion cleans, post etch and implant cleans, and thermal oxidation processing in a 24/7 high volume semiconductor manufacturing facility. Responsibilities include sustaining factory performance, leading process development with focus on cycle time, throughput, equipment uptime and availability, cost, yield, and scrap using Lean 6-Sigma techniques. Obtained my 6-Sigma Green Belt in 2015.Key accomplishments:• Led installation and qualification of new equipment to perform single wafer cleans and worked closely with the equipment vendor to develop and qualify a post metal etch deveil process saving over $1 per wafer pass and increasing yields by 3%• Helped develop and qualify a low cost, single wafer post via etch deveil process saving over $1 per wafer pass• Worked with Equipment Engineers to monitor and report weekly uptime and availability of process equipment and provide updates on key continuous improvement plans to management.• 6-Sigma Green Belt project focused on comparative analysis of wafer substrates which saves the company over $100k per year in test wafer costs• Key member of kaizen team working with engineers, technicians and operators to increase wet bench capacity by over 5% using lean six-sigma techniques• Key member of cross functional team that developed and qualified a post CMP cleans process to improve yield by 3% -
Process Applications EngineerEv Group 2005 - 2006St. Florian Am Inn, AtResponsibilities included technical sales support, organization and facilitation of customer demonstrations, development of customer specific process solutions, and process support and training at the customer site. -
Process Applications EngineerSpeedfam-Ipec, Novellus 2000 - 2005Novellus acquired SpeedFam-IPEC in December, 2002. Hired on as a Process Engineer and proceeded to be promoted through Senior Engineer to Technical Manager responsible for managing the Tungsten department in the development of next generation Chemical Mechanical Planarization machines. Responsibilities in these positions also included development and testing of prototype hardware, development of customer specific process solutions, performing key customer demonstrations, and travel to customer sites for machine installations, process development and training.Key accomplishments:• Managed development of 200mm and 300mm Tungsten CMP POR processes using various slurry types and polishing pads meeting all schedules and deadlines• Led on-site beta testing and development of 300mm Tungsten POR process at customer site• Won head to head run-off at key customer site for 200mm Tungsten process resulting in multiple equipment purchases• Led and managed various equipment upgrades at customer sites including mechanical upgrades and process qualifications
Erik Woods Skills
Semiconductors
Semiconductor Industry
Spc
Design Of Experiments
Failure Analysis
Electronics
Manufacturing
Silicon
Ic
Six Sigma
Product Engineering
Jmp
Thin Films
Metrology
Photolithography
Engineering Management
Characterization
Cmos
Statistical Process Control
Process Integration
Yield
Cvd
Integrated Circuits
Etching
Mems
Erik Woods Education Details
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University Of ArizonaMechanical Engineering -
University Of ArizonaMaterials Science Engineering
Frequently Asked Questions about Erik Woods
What company does Erik Woods work for?
Erik Woods works for Medtronic
What is Erik Woods's role at the current company?
Erik Woods's current role is Principal Wafer Fab Process Engineer at Medtronic.
What is Erik Woods's email address?
Erik Woods's email address is er****@****ale.com
What schools did Erik Woods attend?
Erik Woods attended University Of Arizona, University Of Arizona.
What skills is Erik Woods known for?
Erik Woods has skills like Semiconductors, Semiconductor Industry, Spc, Design Of Experiments, Failure Analysis, Electronics, Manufacturing, Silicon, Ic, Six Sigma, Product Engineering, Jmp.
Who are Erik Woods's colleagues?
Erik Woods's colleagues are Manoj Bisht, Militza Ortiz, Suzanne Butler, Kim Shapiro, Phyllis Elson, Brandon Reynolds, Cabot Rogers.
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