Frank D. Email & Phone Number

USA

Extensive travel and play.

Broomfield, CO

ASIC Design: Developed architecture and coded, using synthesizable Verilog, an eighty thousand gate queue manager, incorporating Quality of Service (QoS), hardware trunking, and Arbitrated Loop algorithms into a state machine used to search a linked list structure. Proved design concepts via lab emulation, where reduced clock rate caused FPGA prototype.

Fort Collins, CO

Software Verification: Conceived, designed, implemented in PERL, and tested a strategy for regression testing of software projects.

Louisville, CO

Hardware Verification: Developed Mentor QuickSim board level simulations. Developed hardware model for use with Mentor design system.

Fort Collins, CO

ASIC Library Development: Modeled SYM9 library for use with IKOS hardware accelerator. Developed IKOS Voyager and Cadence Leapfrog Model Certification Test (MCT) flows. Verified as golden the Leapfrog MCTs using golden Verilog models.

Boulder, CO

ASIC Verification: Developed Verilog simulations that tested the chip under development to given specifications. Experience with PCI and SSA protocols. Experience with Cadence Verilog and Simucad Silos.

Louisville, CO

Hardware Verification: Developed program-critical-path Verilog system simulations that initiated data transfers within the Iceberg Penguin Control Unit, thus testing the board under development to given system specifications. Converted the Verilog data transfers for use with lab emulators during hardware integration phase of board development. Maintained.

Melbourne, FL

Member of the Engineering Productivity Group: Ran benchmarks on available CAE tools to collect data used in the selection of a “recommended tool set.” Responsible for marketing, selling, and applications support of the recommended tools to all Harris divisions, resulting in highly developed customer and vendor interface skills.Areas of expertise:ASIC Test.

Palm Bay, FL

Design Automation: Worked with the Daisy CAE system. Held secret clearance. Designed, wrote, tested, and documented a schematic-tree netlist comparison software program (Daisy proprietary language). Modified an existing applications program to include the designer’s notes with the netlist information being routed to the layout department. Determined the.

Palm Bay, FL

Digital design: Held secret clearance. Experience with state machines, on-line self testing, and off-line self testing. Designed, breadboarded, debugged, and documented TTL board designs.

Manassas, VA

System availability management: Held secret clearance. Experience with fault mapping, baseline fault insertion, and Built-in Test Engineering (BITE) techniques. Experience interfacing with U.S. Government and external companies.

Salem, VA

Developed a software alarm and display package (FORTRAN) for an automated steel mill using a DEC PDP 11/70 computer. Worked with high voltage (30,000 volts) and high current (140,000 amps) on an electrostatic precipitator project. Hands-on experience with transformer design, construction, and use. Hands-on experience with laboratory equipment. Designed.