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A dedicated hardware and test Engineer with extensive experience working in customer focused environments. Recognized for strong background in computer and infrastructure testing, troubleshooting, debugging, documentation, scripting, C programming, Java Programming, and Verilog HDL design. Known for exceptional lab skills and accuracy. Acknowledged as an extraordinary team player dedicated to team success.Keywords: Customer, programming/scripting, troubleshooting, debugging, test, Windows, Linux, Virtualization
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AmdAustin, Tx, Us -
Mts Software EngineerAmd Mar 2018 - PresentSanta Clara, California, UsBIOS Test Automation. Scope, implement, test Python scripts to perform UEFI Firmware / BIOS feature testing. Training and mentoring is also a large part of my job. -
Test EngineerCollabera Contract With Amd Sep 2017 - Mar 2018BIOS testing and Test Automation.
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Java Se 7 Certified Associate Programmer IConsulting Solutions.Net Apr 2017 - Sep 2017Certified Java SE 7 Programmer I
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Cloud Data Center Hardware Engineer | Design | Test/Validation | Power Optimization | DocumentationDell Jun 2013 - Oct 2016Round Rock, Texas, UsSupported Dell Extreme Scale Infrastructure Engineering's largest global cloud data center customer with industry-leading system solutions, including Open Compute Project (OCP) servers.* Lead issue debug and resolution.* Engineering Service Bulletins and customer facing issue resolution documents.* Running customer supplied integration and interoperability tests.* Server system schematic and layout reviews.* Supported Customer Support Team (CST) with Request for Proposals (RFP), including infrastructure planning. Along with optimizing server systems for performance per watt and servers per rack by running Specpower 2008 and IOMeter.* Part of team that managed a network that spanned multiple labs with Linux (SUSE) based servers, including configuring Cisco and Arista switches.Keywords: Customer focus, Scripting, Troubleshooting, Debug, Test Engineer, Windows, Linux, Virtualization -
Cloud Data Center Hardware Engineer | Design | Test | Validation | Power Optimization | ApplicationsAmd Feb 2006 - Dec 2012Santa Clara, California, UsSupport AMD’s number 1 customer in hardware design, validation, and debug of AMD Opteron based server systems with up to 8 sockets. Answering design question from OEM / ODM customer engineers and reviewing their schematics and board designs. Layout reviews involve checking board designs against AMD specific design rules for high speed CPU / chipset signals along with standard layout practices on all signal types. Post-Si and system design validation with real hardware in the lab using AMD manual and automated test tools. These tools include the Static Dynamic Load Emulator (HDLE) for CPU power supply testing and AMD Characterization Environment (ACE) / AMD Pattern Generator (AMDPat) for DDR/DDR2/DDR3 Vref Margining and HyperTransport receiver timing margining. Enter, update, and resolve issues into the company wide issue tracking database. Debug issues with JTAG based Hardware Debug Tool (HDT). Other testing includes taking measurements with oscilloscopes and logic analyzers, writing specific test routines in C language, and using Perl scripts with HDT. Working with different version of Windows, Linux, and Virtualization solutions.Architect, design and test Form Factor Platforms using AMD processors. Writing requirement specifications for platforms. Working with ODMs to implement feature set. Review the schematics, component placement, and final board layout. Bring up on prototype platforms. System design validation and test each section for functionality.Keywords: Customer focus, Troubleshooting, Debug, Test, Windows, Linux, Virtualization -
Server Hardware Design Engineer | Test | Validation | Cpld | FpgaHewlett-Packard Mar 2001 - Feb 2006Houston, Texas, UsDesign, test, and validate Industry Standard Servers. Projects included 1U, 2U, and Blade servers using Intel and AMD server processors, Gigabit Network Switch Blades and Enclosure Management Subsystems. Server design has heavy emphasis on low cost driven by competition and high volume production. Tasks included system architecture, wrote system specification, worked with outsource partners, lead hardware engineer on projects, schematic review, layout review, Altera / Xilinx / Lattice CPLD / FPGA programming using Verilog, and proto board bring up. Other tasks include system validation of platforms using HP’s proprietary validation test suite, working with chip vendors to optimize chip features and pin outs, hardware / firmware / software integration testing, and production line problem solving. -
Applications Engineer | Computer Hardware | Debug | Validation | SemiconductorSigmatel Jun 2000 - Feb 2001Troubleshoot and resolve customer problems with AC97 Audio Codec designs. Design, build, test and troubleshoot audio signal circuits for customer applications and company application recommendations. Test analog performance of SigmaTel audio codec IC's and competitor's codecs using Audio Precision Audio Analyzer. Write technical sections for data sheets on new parts. Build and setup computer demo machines for trade shows.
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Electronics Design Engineer | Communications | Analog | DigitalSiemens Sep 1998 - Jun 2000Munich, DeAnalog and digital circuit designs for cordless telephones. Tasks include battery requirement and charging circuits, discrete power supplies, Caller ID circuits, and CODEC verification circuits. A heavy emphasis is placed on low cost for high volume production. Built hardware and coded, in C, software to test charging circuits and to determine characteristics as batteries age. -
Dram Module Design Engineer | Signal IntegrityTexas Instruments Jan 1998 - Jun 1998Dallas, Tx, UsDesign and simulation of high speed PC-100 memory module circuit boards. Including schematic capture, design rule specification, layout, Gerber generation, and working with simulation engineers on signal integrity optimization. -
Electronics Design Engineer | Computer Hardware | Fpga | CpldSynergy Micro Systems Inc Aug 1996 - Jan 1998Digital and analog designs of VME based single board computer I/O subsystems. Projects included video mixer board, 32 channel serial I/O board, Dual 100base-TX Ethernet, USB, PS/2 keyboard / mouse, parallel port, dual serial port board with a proprietary bus to PCI bus interface using Xilinx CPLD. CPLD / FPGA code written using proprietary ABLE like programming language and verified with proprietary timing simulation tool. Coded test software to test hardware under VxWorks. -
Project Engineer | Project ManagerTucker Technologies Jan 1992 - Aug 1996Analog and digital circuit designs for sonic well logging tools. I was responsible for all activities in the development of a Full Wave Form Sonic Logging Tool. Design and testing of piezoelectric crystal transmitters, low noise high accuracy analog signal conditioners, Sigma-Delta A/D converters, multi-level DSP processors, part selection based on performance, cost, and the ability for withstand the harsh logging environment, built and operated a PC based data acquisition system to acquire test data for prototype sensor arrays. The data acquisition system software was written in C and assembly language. Also, I redesigned the existing Sonic Logging Tool to increase tool accuracy and reliability. -
Field Engineer | Well Logging Engineer | Field SupervisorHalliburton May 1981 - Mar 1989Houston, Texas, UsCalibrate, test, analyze, and interpret oil well logs for oil discovery. Job included surface equipment and down hole test tool maintenance and repair, and customer interface
Gary Becker Skills
Gary Becker Education Details
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Oklahoma State UniversityElectrical Engineering -
Oklahoma State UniversityElectrical Engineering Technology
Frequently Asked Questions about Gary Becker
What company does Gary Becker work for?
Gary Becker works for Amd
What is Gary Becker's role at the current company?
Gary Becker's current role is MTS Software Engineer at AMD.
What is Gary Becker's email address?
Gary Becker's email address is dl****@****hoo.com
What is Gary Becker's direct phone number?
Gary Becker's direct phone number is (800) 433*****
What schools did Gary Becker attend?
Gary Becker attended Oklahoma State University, Oklahoma State University.
What are some of Gary Becker's interests?
Gary Becker has interest in Arm, Embedded Linux, Plug Computers, Retro Computer Soc In Fpga, Cloud Computing, Virtualization, Customer Support, Model Rocket Design And Building, Hardware Design, Amateur Radio Af5qb.
What skills is Gary Becker known for?
Gary Becker has skills like Debugging, Hardware Architecture, Processors, Firmware, Fpga, Soc, Microprocessors, Verilog, Hardware, C, X86, Testing.
Who are Gary Becker's colleagues?
Gary Becker's colleagues are Hean-Seng Tan, Pratik Gajera, Vummiti Kota Jyothi, Parvez Ahmmed, Cindy Tien, Michael Chen, Derek Heidewald.
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