Currently work in Shanghai,China7+ Years of industry IC Design ExperienceSmartPhone Application Processor(AP) and System On Chip(SOC)◆3D Graphics Processing Unit(GPU) Micro-Achitecture and Hardware Design◆GPU Excecution Unit(GPU Shader Core) Sub-Block Design Experience- L1 Intruction Cache Design Experience- Thread Scheduler/Controller Design Experience...... SMT(Simultaneous Multi-Threading)...... Instruction Decoding and Instruction Fetch Arbitration...... Control Dependency(Branch) and Data Dependency Handling(RAW,WAW)...... Global Resouce Arbitration and Instruction Multi-Issuing◇ISA(Instruction Set Architecture) and Micro-ISA◇DirectX 9/10/11, OpenGL, OpenGL ES, OpenCL◇Computer Architecture and GPU Architecture...... ILP(Instruction Level Parallelism) and TLP(Thread Level Parallelism)...... Vector Processing and SIMD(Single Instruction Multiple Data)◇Memory Hierachy Basics and Cache Knowledge◆100G ODSP(Optical Digital Signl Processor) Design Experience...... Time Domain Equalization: Adaptive FIR, Carrier Recovery...... Frequency Domain Equalization: FFT/IFFTHigh Speed Data-Path design, Implementation and OptimizationGood understanding of ASIC Flow, design and verification methodologyFamiliar with RTL Synthesis using Design Compiler (DC) / DCTFamiliar with Functional Verification including VMM, System-Verilog, Assertion, UTGood Technical Troubleshooting and Problem Solving SkillsSpecialties: Micro-Achitecture Design, RTL with good QoR, Synthesis, Timing, High Speed DataPath Design
Via-S3 Graphics, Via Cpu Platform, Via Alliance
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Gpu Hardware EngineerVia-S3 Graphics, Via Cpu Platform, Via Alliance Apr 2012 - PresentShanghai City, ChinaEXXX1000: OpenGL ES2.0-GPU Excecution Unit(GPU Shader Core) Sub-Block Design......L1 Instruction Cache design, checkpoint design and coverage analysis......Review a very powerful and complicated Multi-Thread Control (THC) code.(DX11)EXXX2000: OpenGL ES2.0SmartPhone Application Processor(AP) and System On Chip(SOC)-GPU Excecution Unit(GPU Shader Core) Sub-Block Design .......Multi-Thread Control (THC) micro-architecture design, documentation, RTL, and UT verification.......Critical path equivalent transformation to fix and improve timing of the THC........ Balance priority among 4 ALU sets to improve the issue performance .......GPU core level and Excecution Unit Level Verification and DebugEXXX3000: OpenGL ES3.2-GPU Excecution Unit(GPU Shader Core) Sub-Block Design .......ISA and Instruction Combine Discuss and Determine.......Propose new pipeline architecture and write new RTL.......Multi-Thread Control (THC) micro-architecture design, documentation
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Asic Design EngineerHuawei Jun 2010 - Apr 2012Chengdu, Sichuan, China100G ODSP project SDXXX1V100: High Speed Datapath Design-Micro-architecture design, datapath optimization and RTL Coding of XX module from fixed-point algorithm model.-UT verification including writing test features and testcases, verification completeness analysis of XX module.-Collecting and improving datapath design methods to achieve high performance and relatively low cost/power.
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Mixed Signal Ic DesignRfic Lab, Uestc Jun 2008 - Jun 2010Chengdu, Sichuan, ChinaTeam Leader of Digital TeamResponsible for architecture design of baseband, coding, FPGA verification, synthesis, STA, formal verificationPower optimization and cost saving to succeed eventually in achieve a very competitive chip in UHF RFID field
George He Skills
George He Education Details
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Digital Ic Design, Mixed Signal Ic Design, Low Power Circuit Design -
Digital Signal Processing, Digital Logic Design
Frequently Asked Questions about George He
What company does George He work for?
George He works for Via-S3 Graphics, Via Cpu Platform, Via Alliance
What is George He's role at the current company?
George He's current role is GPU Hardware Engineer at VIA-S3 Graphics.
What schools did George He attend?
George He attended University Of Electronic Science And Technology, University Of Electronic Science And Technology.
What skills is George He known for?
George He has skills like Asic, Fpga, Soc, Rtl Design, Integrated Circuit Design, Hardware Architecture, Static Timing Analysis, Functional Verification, Computer Architecture, Simulations.
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