George He
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George He Email & Phone Number

GPU Hardware Engineer at VIA-S3 Graphics at VIA-S3 Graphics, VIA CPU platform, VIA alliance
Location: Shanghai, China 3 work roles 2 schools
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Current company
VIA-S3 Graphics, VIA CPU platform, VIA alliance
Role
GPU Hardware Engineer at VIA-S3 Graphics
Location
Shanghai, China

Who is George He? Overview

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George He is listed as GPU Hardware Engineer at VIA-S3 Graphics at VIA-S3 Graphics, VIA CPU platform, VIA alliance, based in Shanghai, China. AeroLeads shows a matched LinkedIn profile for George He.

George He previously worked as GPU Hardware Engineer at Via-S3 Graphics, Via Cpu Platform, Via Alliance and ASIC Design Engineer at Huawei. George He holds Master'S Degree, Digital Ic Design, Mixed Signal Ic Design, Low Power Circuit Design from University Of Electronic Science And Technology.

Profile bio

About George He

Currently work in Shanghai,China7+ Years of industry IC Design ExperienceSmartPhone Application Processor(AP) and System On Chip(SOC)◆3D Graphics Processing Unit(GPU) Micro-Achitecture and Hardware Design◆GPU Excecution Unit(GPU Shader Core) Sub-Block Design Experience- L1 Intruction Cache Design Experience- Thread Scheduler/Controller Design Experience...... SMT(Simultaneous Multi-Threading)...... Instruction Decoding and Instruction Fetch Arbitration...... Control Dependency(Branch) and Data Dependency Handling(RAW,WAW)...... Global Resouce Arbitration and Instruction Multi-Issuing◇ISA(Instruction Set Architecture) and Micro-ISA◇DirectX 9/10/11, OpenGL, OpenGL ES, OpenCL◇Computer Architecture and GPU Architecture...... ILP(Instruction Level Parallelism) and TLP(Thread Level Parallelism)...... Vector Processing and SIMD(Single Instruction Multiple Data)◇Memory Hierachy Basics and Cache Knowledge◆100G ODSP(Optical Digital Signl Processor) Design Experience...... Time Domain Equalization: Adaptive FIR, Carrier Recovery...... Frequency Domain Equalization: FFT/IFFTHigh Speed Data-Path design, Implementation and OptimizationGood understanding of ASIC Flow, design and verification methodologyFamiliar with RTL Synthesis using Design Compiler (DC) / DCTFamiliar with Functional Verification including VMM, System-Verilog, Assertion, UTGood Technical Troubleshooting and Problem Solving SkillsSpecialties: Micro-Achitecture Design, RTL with good QoR, Synthesis, Timing, High Speed DataPath Design

Listed skills include Asic, Fpga, Soc, Rtl Design, and 6 others.

Current workplace

George He's current company

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VIA-S3 Graphics, VIA CPU platform, VIA alliance
Via-S3 Graphics, Via Cpu Platform, Via Alliance
GPU Hardware Engineer at VIA-S3 Graphics
3 roles

George He work experience

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Gpu Hardware Engineer

Current
Via-S3 Graphics, Via Cpu Platform, Via Alliance

Shanghai City, China

EXXX1000: OpenGL ES2.0-GPU Excecution Unit(GPU Shader Core) Sub-Block Design......L1 Instruction Cache design, checkpoint design and coverage analysis......Review a very powerful and complicated Multi-Thread Control (THC) code.(DX11)EXXX2000: OpenGL ES2.0SmartPhone Application Processor(AP) and System On Chip(SOC)-GPU Excecution Unit(GPU Shader Core) Sub-Block Design .......Multi-Thread Control (THC) micro-architecture design, documentation, RTL, and UT verification.......Critical path equivalent transformation to fix and improve timing of the THC........ Balance priority among 4 ALU sets to improve the issue performance .......GPU core level and Excecution Unit Level Verification and DebugEXXX3000: OpenGL ES3.2-GPU Excecution Unit(GPU Shader Core) Sub-Block Design .......ISA and Instruction Combine Discuss and Determine.......Propose new pipeline architecture and write new RTL.......Multi-Thread Control (THC) micro-architecture design, documentation

Apr 2012 - Present

Asic Design Engineer

Huawei

Chengdu, Sichuan, China

100G ODSP project SDXXX1V100: High Speed Datapath Design-Micro-architecture design, datapath optimization and RTL Coding of XX module from fixed-point algorithm model.-UT verification including writing test features and testcases, verification completeness analysis of XX module.-Collecting and improving datapath design methods to achieve high performance and relatively low cost/power.

Jun 2010 - Apr 2012

Mixed Signal Ic Design

Rfic Lab, Uestc

Chengdu, Sichuan, China

Team Leader of Digital TeamResponsible for architecture design of baseband, coding, FPGA verification, synthesis, STA, formal verificationPower optimization and cost saving to succeed eventually in achieve a very competitive chip in UHF RFID field

Jun 2008 - Jun 2010
2 education records

George He education

FAQ

Frequently asked questions about George He

Quick answers generated from the profile data available on this page.

What company does George He work for?

George He works for VIA-S3 Graphics, VIA CPU platform, VIA alliance.

What is George He's role at VIA-S3 Graphics, VIA CPU platform, VIA alliance?

George He is listed as GPU Hardware Engineer at VIA-S3 Graphics at VIA-S3 Graphics, VIA CPU platform, VIA alliance.

Where is George He based?

George He is based in Shanghai, China while working with VIA-S3 Graphics, VIA CPU platform, VIA alliance.

What companies has George He worked for?

George He has worked for Via-S3 Graphics, Via Cpu Platform, Via Alliance, Huawei, and Rfic Lab, Uestc.

How can I contact George He?

You can use AeroLeads to view verified contact signals for George He at VIA-S3 Graphics, VIA CPU platform, VIA alliance, including work email, phone, and LinkedIn data when available.

What schools did George He attend?

George He holds Master'S Degree, Digital Ic Design, Mixed Signal Ic Design, Low Power Circuit Design from University Of Electronic Science And Technology.

What skills is George He known for?

George He is listed with skills including Asic, Fpga, Soc, Rtl Design, Integrated Circuit Design, Hardware Architecture, Static Timing Analysis, and Functional Verification.

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