Greg Huber Email & Phone Number

Johnson City, Texas, United States

Austin, Texas

Austin, Texas Area

- Managed teams in Austin, Oregon, and Malaysia that developed Intel’s Product Platform Validation (PPV) System Level Test (SLT) test collateral. Tests were used to screen all internal and external samples (prototype products), drive improvements in upstream ATE test quality, identify and drive closure of all product and platform bugs, and release factory.

- Recruited to drive a new vision of discipline, quality, and cost reduction on Client new product development. Identified key new positions for moderate growth. Recognized for turning team’s reputation around for being best at Intel.- The team developed and managed the outgoing quality data stream, and SLT-Measured outgoing test hole escape closure.

- Recruited to lead a department that was in danger of being “fired” by the internal customer. Turned team into the preferred solution provider, recognized by the VP and GM for establishing a close partnership, and for being aligned with the vision, cost, quality, and delivery in a very competitive business.- Managed teams in Oregon and Malaysia.

Acted as a customer support engineer specializing in board test techniques. Worked with many of Intel's largest Client and Server microprocessor and chipset customers, assisting their board test engineering departments with strategies and software to test their board designs. Formed and managed software team that developed automatic test program generation.

Technical Leader in the area of board test development and software development and automation tools. Worked in various positions as a test development engineer. Used min/max simulator to model new component and board designs, and to develop test software used to validate new ASIC and board designs, and to functionally test boards in board manufacturing..