Gregory Stitt Email & Phone Number

I have over 20 years experience with field-programmable gate arrays (FPGAs), hardware design, ASICs, timing closure/optimization, computer architecture, EDA, parallel computing, and embedded systems, with over 100 published papers on these topics. I also have a significant amount of software experience, with most of my funded projects involving hw/sw co-design. I have been a PI and/or Co-PI on grants totaling approximately $14 millions dollars.I am considered an expert in the area of FPGAs, where I have published many papers. I was the Program Chair of the the IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM) in 2021. As part of my research, I have worked with many companies/agencies, including Intel, Microsoft, NASA Goddard, NASA Kennedy, Xilinx, National Instruments, L3Harris, Cadence, Draper, Walt Disney Animation Studios, DOE, NNSA, among others.I am also recognized as an expert in SystemVerilog, VHDL, and timing optimization, for which I have developed publicly available tutorials used in multiple universities:https://github.com/ARC-Lab-UF/sv-tutorialhttps://github.com/ARC-Lab-UF/vhdl-tutorialhttps://github.com/ARC-Lab-UF/intel-training-modules/tree/master/timing For a full list of publications, refer to: http://www.gstitt.ece.ufl.edu/publications.htmlFor a complete CV, refer to: http://www.gstitt.ece.ufl.edu/gstitt_cv.pdfAwards Summary:~$14 million in total funding5 patents + 3 more under reviewOver 100 published papersNSF CAREER AwardPramod P. Khargonekar Junior Faculty Award for Excellence. 2013IEEE/HKN Professor of the Year 2013-2014University of Florida College of Engineering Undergraduate Teacher of the Year (2014-2015 Academic Year)HKN Faculty Member of the Year Award 2016-2017University of Florida College of Engineering Undergraduate Teacher of the Year (2019-2020 Academic Year)Ruth and Joel Spira Excellence in Teaching Award. May 2021Best Paper Award. D. Wilson, G. Stitt, and J. Coole, “A recurrently generated overlay architecture for rapid fpga application development,” in Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2018, (New York, NY, USA), pp. 4:1–4:6, ACM, 2018.