Hristo Dimitrov work email
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Hristo Dimitrov personal email
Working as an ASIC Front-End Design Engineer, I'm involved through the whole SoC development process starting at HLS down up to gate level netlists, focusing on design and verification. Through this I've been exposed to third-party IP integration, HLS using Cadence and Mentor tools, ATE validation, verification at System-C and at gate-level level of abstraction.I graduated with a MEng in Computer Science and Electronics from the University of Bristol. This course exposed me to a mixture of units from both the Computer Science and the Electrical Engineering department, providing me with a range of theoretical and practical abilities to approach problems in both hardware and software domain.Through my internship in Blu Wireless Technology I was responsible for integrating the company IP on an FPGA, using the Xilinx tool chain, including Vivado, SDK and Petalinux, gaining knowledge in areas such as System Design, HDL languages, Tcl, IP-XACT, Kernel and Device Tree, while designing complex systems in the Zynq 7000 family. Additionally I was developing as part of a research project synthesizable System-C interfaces for ASIC and FPGA designs utilizing Cadence's High-Level Synthesis tool C-to-Silicon. This exposed me to the different design abstraction levels, benefits of system level modeling and analysis, as well as software and hardware co-simulation.
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Blu WirelessBlu WirelessBristol, England, Gb -
Senior Ic EngineerEnsilica Dec 2022 - Present -
Senior Front End Design Engineer & Integration Team LeadBlu Wireless May 2019 - Dec 2022Bristol, United Kingdom -
Front End Integration Team LeadBlu Wireless Technology Ltd May 2018 - Dec 2022Bristol, United Kingdom -
Front End Design EngineerBlu Wireless Technology Ltd Aug 2016 - Dec 2022Bristol, United Kingdom -
Undergraduate InternBlu Wireless Technology Ltd Oct 2014 - Sep 2015Bristol, United KingdomAs system-on-chips continue to grow both in size and complexity, new design and verification methodologies are needed to help engineers keep up. SystemC is proving to be an effective high-level modeling language, capable of describing chip models at different abstraction levels, from transactional-level to RTL.High-level synthesis tools are also gaining more popularity and are considered to be in the heart of next generation SoC design methodologies. These tools generate RTL Verilog from synthesizable high-level languages such as SystemC, while providing optimization and monitoring options, like micro-architecture exploration and comparison of the quality of results.Blu Wireless Technology as a fabless, silicon intellectual property (IP) company is developing a next generation scalable, low-cost 60 GHz Wireless Gigabit Alliance (WiGig) technology targeting the 802.11ad and 4G backhaul markets. It utilizes both SystemC and Cadence C-to-Silicon Compiler for high-level synthesis in order to achieve fast product turnaround. Building on top this methodology, the company has developed their own definition language, called Phhidle, with the purpose of automating the generation of design models and interconnects at different levels.In this project, after an initial study of the Phhidle generator and C-to-Silicon Compiler, a synthesizable SystemC block wrapper with an ARM AXI4-Lite interface and a custom third party IP placeholder was generated with all accompanying internal connections.The purpose of this project is to ease the integration of third-party IPs such as memories and peripherals within system-on-chips, which are using the ARM AMBA protocol. -
Student AmbassadorUniversity Of Bristol Jun 2013 - Jul 2013Bristol, United KingdomI was responsible for the smooth running of the open days at the university. I assisted and managed prospective students and their parents. I had to talk about the different opportunities available in the university. My main focus were the computer science and electronics department in the university, talking about what projects, that are being undertaken at the moment and how they can get involved, as I had first hand experience with that myself.
Hristo Dimitrov Skills
Hristo Dimitrov Education Details
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Upper Second-Class Honours
Frequently Asked Questions about Hristo Dimitrov
What company does Hristo Dimitrov work for?
Hristo Dimitrov works for Blu Wireless
What is Hristo Dimitrov's role at the current company?
Hristo Dimitrov's current role is Blu Wireless.
What is Hristo Dimitrov's email address?
Hristo Dimitrov's email address is hr****@****ogy.com
What schools did Hristo Dimitrov attend?
Hristo Dimitrov attended University Of Bristol.
What are some of Hristo Dimitrov's interests?
Hristo Dimitrov has interest in Science And Technology, Environment.
What skills is Hristo Dimitrov known for?
Hristo Dimitrov has skills like C, Matlab, Java, C++, Teamwork, Programming, Microsoft Office, Vhdl, Fpga, Html, Windows, Php.
Who are Hristo Dimitrov's colleagues?
Hristo Dimitrov's colleagues are Ellis Deeney, Yves Nicoue, Jeff Blanchard, Vijaya Kumar Balan, Oliver Gardiner, Joseph Purle, Tim Beggs.
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Hristo Dimitrov
Logistics Coordinator | Expert In Route Planning, Fleet Management & Costreduction | Driving Operational Efficiency & Customer SatisfactionHartlepool -
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