Jack Knutson

Jack Knutson Email and Phone Number

Financial Advisor, Author, Engineer @ The CoLoadX Corporation
jamaica, new york, united states
Jack Knutson's Location
Fremont, California, United States, United States
Jack Knutson's Contact Details

Jack Knutson work email

Jack Knutson personal email

About Jack Knutson

Senior Applications and Design Engineer for ASIC/FPGA both Mixed Signal and Digital Languages: Verilog; VHDL, System Verilog; Perl; C-shell; C

Jack Knutson's Current Company Details
The CoLoadX Corporation

The Coloadx Corporation

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Financial Advisor, Author, Engineer
jamaica, new york, united states
Website:
coloadx.com
Employees:
9
Jack Knutson Work Experience Details
  • The Coloadx Corporation
    Advisory Board Member
    The Coloadx Corporation Jan 2014 - Present
    San Francisco Bay Area; New York
    Duties: Based on prior experience in engineering and ocean transportation, provided guidance on the strategic technological direction of the company.- Recommended approach on building out a connected platform- Worked a roadmap for approaching the ocean carriers and building a customer base- Advised on investor possibilities and participated in communication and pitch sessions
  • Admiral Aardvark Publishing
    Author
    Admiral Aardvark Publishing Jan 2015 - Jan 2017
    San Francisco Bay Area
    Duties: Successfully published a children’s book titled “Admiral Aardvark's Fantastic Menagerie or Why the Best Name for a Rhinoceros is Pinocchio”. The book is now available in book stores and at Amazon.Poetry competition – "Semi-Finalist" Nation Magazine Discovery
  • Ameriprise Financial Services, Inc.
    Financial Advisor
    Ameriprise Financial Services, Inc. Mar 2016 - Jul 2016
    San Francisco Bay Area
    Passed Series 7 with 87%Passed Series 66 with 89%Variable Contracts AgentLife-Only AgentAccident and Health AgentPassed CFP (R) Exam. This is the Certified Financial Planner TM exam.(January - March 2016)
  • Stars, The Agency
    Actor Performer
    Stars, The Agency Jun 2007 - Dec 2015
    San Francisco
    Actor in Movies, Commercials and Stage productions
  • Synopsys
    Senior Corporate Applications Engineer
    Synopsys Jan 2007 - Apr 2013
    Mountain View, Ca
    Synopsys Senior CAE, Corporate Application Engineer* Feature Development: Wrote RTL Verilog/VHDL tests for feature testing of synthesis tool including- Altera DSP Stratixv- Byte Wide Write Enable RAM- Asymmetric RAM etc. * Debugged daily regression failures * Dealt with customer issues filed in CRM system* Established premier presence of simulation debug of failing tests in VCS, Aldec and NCsim simulators. * Wrote and presented application notes including : Understanding and Avoiding Race Conditions, Initialization, and Competing Control Signal Issues in Simulation for Verilog/VHDL Testbenches in VCS and other Digital Simulators
  • Fremont And Hayward Unified School District
    Mathematics Teacher
    Fremont And Hayward Unified School District Aug 2005 - Dec 2006
    Hayward, Ca
    * Taught Geometry and Algebra for Fremont and Hayward Unified School District
  • Oxford And Associates
    Asic Engineering Consultant
    Oxford And Associates Jul 2004 - Aug 2005
    Sunnyvale, Ca
    * Verilog Bluetooth project Design/Verification, Broadcom Corporation etc. * Rapid prototyping system up to 10 million equivalent ASIC gates.
  • Seagate Technology
    Senior Staff Design Engineer
    Seagate Technology 2001 - 2004
    Scotts Valley, Ca And Bloomington, Mn
    ASIC controller and FPGA design* Wrote RTL VHDL code, simulated, placed and routed DSP Interpolated Timing Recovery system from C code and additionally created a 270MhzData Downshift FPGA using Xilinx tools. * Senior Staff engineer in VLSI integration and verification, wrote chip level Verilog simulation verification for Yuma SATA-Serial ATA controller. * Performed Primetime Static Timing Analysis verification on Sequoia 1 1.3 million gate dual embedded ARM processor hard disk controller. * Wrote and published Synopsys TCL script and application SNUG paper based on Primetime work.
  • Positive Edge Asic Consultant At Cypress, Cadence
    Asic Consultant And Engineer
    Positive Edge Asic Consultant At Cypress, Cadence 1998 - 2001
    San Jose, Ca
    Engineering ASIC consultant performing logic, architectural and specification analysis for independent designs. * RTL Verilog coding and FPGA synthesis place and route using Altera and Exemplar and Synplicity, for SDRAM three port data path controllers in PCI-bus Power Processor and printer server applications for Splash Technology. * Architected and wrote specification for debug tool GUI and user interface for multi-million gate emulation environment as Technical Marketing architect of Debug/Runtime Simulation tool GUI along with highly focused customer interface and project tracking for Cadence Design Systems. * Wrote and performed simulation and verification of Bluetooth design using Verilog, C and Unix shell scripts with Cypress Semiconductor R&D team. * Wrote Marketing Requirement Document for User Interface for Emulator.
  • Texas Instruments (Formerly Silicon Systems)
    Senior Staff Design Engineer
    Texas Instruments (Formerly Silicon Systems) 1994 - 1998
    San Jose, Ca
    * Patent filed for Dual Programmable Write Precompensation with 50ps resolution for super 250MHz write date operation. Primary architect and designer of Read Channel Write Path circuit. * Lead Digital Architect and Designer in a Mixed-Signal BiCMOS Read Channel Group * Designed best and most reliable High Speed Channel Write Data path for high performance PRML Read Channel chips ever done at Silicon Systems. This was used in many spin-off designs * Architectural digital portion of the Read Path * Design and simulate with SPICE and Mixed Signal Simulator ATTSIM Read-Write digital circuitry for 250MHz high performance Read Channels.* Introduced and championed and team led Snopsys synthesis to Read Channel group* Design and simulated memory buffer control for Advanced SCSI disk controller.
  • Farrel Lines; United States Lines; Lykes Bros. Steamship
    Chief Electrian; 3Rd Asst. Engineer Steam And Gas Turbine Vessels Any Horsepower
    Farrel Lines; United States Lines; Lykes Bros. Steamship Jan 1978 - May 1984
    Home Ports: Greater New York City Area; New Orleans; San Francisco
    Sailed on ammunition ships Diego Garcia supporting U.S. Navy/Marine operations Persian Gulf.Supported U.S. Bases Okinawa, Guam etc. Supplied Kaoshiung, Pusan, Yokohama, Hong Kong etc.

Jack Knutson Skills

Verilog Fpga Asic Vhdl Perl Tcl Debugging Static Timing Analysis Ic Embedded Systems Vlsi Eda Digital Signal Processors Semiconductors Mixed Signal Analog Soc Logic Synthesis Xilinx Altera Simulations C Rtl Design Matlab Application Specific Integrated Circuits

Jack Knutson Education Details

Frequently Asked Questions about Jack Knutson

What company does Jack Knutson work for?

Jack Knutson works for The Coloadx Corporation

What is Jack Knutson's role at the current company?

Jack Knutson's current role is Financial Advisor, Author, Engineer.

What is Jack Knutson's email address?

Jack Knutson's email address is ja****@****ail.com

What schools did Jack Knutson attend?

Jack Knutson attended San Jose State University, San Jose State University, U.c. Berkeley.

What are some of Jack Knutson's interests?

Jack Knutson has interest in Arts And Culture, Jazz And Blues Piano, Expository And Fiction Writing, Classical.

What skills is Jack Knutson known for?

Jack Knutson has skills like Verilog, Fpga, Asic, Vhdl, Perl, Tcl, Debugging, Static Timing Analysis, Ic, Embedded Systems, Vlsi, Eda.

Who are Jack Knutson's colleagues?

Jack Knutson's colleagues are Ella Gray, Rena Gray, Christopher Davis.

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