Jainik Kathiara Email & Phone Number

Sunnyvale, Ca, Us

Mountain View, Ca, Us

Wilmington, Ma, Us

Lead Design Verification Engineer• Led team for end-to-end verification of ARM Cortex-M33 based secure processor subsystem• Worked with Architecture and Software team to develop comprehensive verification plan for hardwareand firmware validation in pre-silicon environments• Setup unified environment for simulation and emulation• Actively tracked and reported team progress to management using agile development processStaff Design Verification Engineer • Verification planning, management and execution with focus on advanced verification techniques which includes formal verification, emulation and Hardware-Software Co-verification.• Built Unified System Level Testbench Environment for Simulation and Emulation platform.• Developed synthesizable UVM VIPs for signal processing blocks.• Verified DC, Quadrature Error and LO Leakage correction algorithms for transceiver chips.• Technically leading Junior Engineers with their verification tasks (Testbench environment building, Verification plan creation and review, Gate level simulations).Sr. Design Verification Engineer• Architect and Build System Level Testbench for ARM based dual core SOCs.• Developed and Integrated C/C++, MATLAB reference models into the testbench.• Verified Bus Architecture of ARM based dual core SOCs using Formal Verification.• Developed internal simulation VIPs & support/define others to improve verification methodologies.• Supported Silicon Bring up and created simulation tests for post silicon issues.Design Verification Engineer • Developed VMM based test environment for Blackfin CPU core execution unit.• Developed checkers and C-based transactors to verify the design.• Implemented Functional coverage and analyzed code coverage to ensure design & verification quality.• Created random instruction generator to verify integration of the execution unit in the Blackfin CPU core.• Created Perl/Shell script to automate simulation flow and manage regressions.

Wilmington, Ma, Us

Responsibilities includes provide basic support and route customer problems to appropriate application engineer, device driver development.During my Co-op, performed Power management tests for Blackfin processor, designed walk-in example of one time programmable memory, SPI (Serial Peripheral Interface) and LVDS driver design for Blackfin processor communication

Austin, Texas, Us

Worked in Verification team of 10 - 20 people. Responsibilties includes, system level testplan creation and review, RTL and postlayout verification and provide knowledge based support to validation team.Verified various interchip communication protocols such as SPI, SSI, UART, PPI.

Austin, Texas, Us

Designed and verified Mnemonics based General Purpose Timer which interfaces with ARM core and Bus Functional Model (BFM) of AMBA AHB bus master.

Master Of Science, Electrical And Computer Engineering

Bachelor Of Engineering, Electrical And Computer Engineering