James Avula Email & Phone Number

Bengaluru, Karnataka, India

Hyderabad

client -- AMDTech node -- 6nm• Responsible for Synthesis, PNR, FCECOs and BTO/MTOs.• Custom built clock structure using RDL layers & clock buffers from clock port to till root definition buffer.• Custom built long distant critical high frequency signals using higher metal layers.• Custom staggered type repeater placement to meet critical interface timing.• Custom buffering and placement to meet long distant critical timing signals.• Implemented Multipoint CTS to provide a balanced clock to custom placed repeaters.• Performed custom RDL routing for some critical timing paths.• Worked on Sign off timing, physical verification, IR and EM closure.• Written tcl based scripts to make manual work easier.

Hyderabad, Telangana, India

Noida, Uttar Pradesh, India

Bachelor Of Technology - Btech, Electronics And Communications Engineering, 8.3

Diploma, Electrical, Electronics And Communications Engineering, 9.48

X, High School/Secondary Certificate Programs, 9.3