Front-end design engineer responsible for micro architecture, RTL design, and module level verification of leading edge technologies for deep-submicron process nodes.

Responsible for digital system architecture, RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g., synthesis, timing closure, and scan insertion), and verification. Additional responsibilities include detailed documentation, test vector development, lab test and evaluation, and other activities as required for the achievement of high volume production.

Responsible for specification, design, verification, and validation of digital logic designs targeting Altera and Xilinx Field Programmable Gate Arrays (FPGAs).

ASIC Designer (2000-2003)Design Engineer responsible for device development including specification, design, verification, and validation of Application Specific Integrated Circuits (ASICs). System Engineer (1999)Design, develop, modify, and verify systems to support Application Specific Standard Products (ASSP) post-silicon validation.

One of four hardware design engineers responsible for all of the Tektronix business computer products including Windows Based Terminals (WBTs), Network Computers (NCs), X terminals, and related hardware options.