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Jeff Hanscom is listed as Senior Logic Design Engineer at IBM, a company with 512090 employees, based in Poughkeepsie, New York, United States. AeroLeads shows a work email signal at ibm.com and a matched LinkedIn profile for Jeff Hanscom.
Jeff Hanscom previously worked as Senior Engineer at Ibm and Advisory Engineer at Ibm. Jeff Hanscom holds Me from Rensselaer Polytechnic Institute.
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I'm a highly motivated, skilled digital logic engineer and project lead with a focus on high quality and efficiency. Currently, I'm a PCIe Expert, the PCIe Stack Lead for the IBM PCI Center of Competence team, and IBM's PCI Special Interest Group (SIG) representative. Under my leadership, we provide building block logic design macros as well as consultation for architecture, design and debug of all Processors, ASICS and FPGAs requiring PCI on the IBM systems Z and P platforms.I have 20+ years of experience in logic design for PCI, PCI-X and PCIe. I have also executed architecture and logic design for networking offload engines and Crypo SoC ASICs in the high RAS System Z ecosystem.In addition to architecture and logic design, I have experience in ASIC characterization, in both bench and system environments. This includes creating characterization plans and executing them in thermal chambers.Specialties: - Logic Design & Debug - Timing analysis - IBM System Z I/O architecture - PCI(-X,-E) - Perl - VHDL - VerilogIf you're interested in finding out more, please reach me via LinkedIn.
Listed skills include Logic Design, Hardware Design, Functional Verification, Static Timing Analysis, and 19 others.
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Poughkeepsie, New York, United States
As the stack lead for the PCIe Center of Competency, my role continues to grow in scope. I lead a team of 7 logic design engineers that build the PCIe stacks for all IBM P and Z series processors and ASICs. In this role, for each project I gather requirements, architect the PCIe stacks, plan the schedule, and manage the development and execution while.
Poughkeepsie, New York, United States
I continued to gain breadth in STG ASICs, owning logic units within an Ethernet offload engine. Following the ASIC to the test floor, I created and executed a system characterization plan utilizing the temperature chamber. I became a member of the IBM PCI Center Of Competence (PCOC), leading the architecture and implementation of all IBM ASIC PCIe Root.
Poughkeepsie, New York, United States
I continued work in STG Z Series ASICs while becoming a PCI Unit lead, architecting and implementing a PCI Express (PCIe) Gen1 Root Complex stack for an SoC ASIC. I gained experience in logic timing take-down and Engineering Changes for netlists on frozen logic. I also aided in test floor bringup and debug of the completed ASIC, specifically with PCIe link.
Poughkeepsie, NY
I started as a Hardware Logic Designer for STG Mainframe ASICs in Z Series IO, for Storage and Ethernet Solutions (FCP, Ficon, OSA Express). I designed a PCI-X Root Complex Stack, a custom DCR Interface Bridge, and aided in the design of a custom internal switch for an SoC ASIC.
Wrote scripts using perl and TCL/TK to provide internal network/tool status.Assisted with some basic VHDL coding.
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Quick answers generated from the profile data available on this page.
Jeff Hanscom works for IBM.
Jeff Hanscom is listed as Senior Logic Design Engineer at IBM.
AeroLeads has found 2 work email signals at @ibm.com for Jeff Hanscom at IBM.
Jeff Hanscom is based in Poughkeepsie, New York, United States while working with IBM.
Jeff Hanscom has worked for Ibm and Avid Technology.
Jeff Hanscom's colleagues at IBM include Jim Sims, Gaurav Yadav, Sudhir Singh, Ashleigh Shona Denholm, and Padmini Durai.
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Jeff Hanscom holds Me from Rensselaer Polytechnic Institute.
Jeff Hanscom is listed with skills including Logic Design, Hardware Design, Functional Verification, Static Timing Analysis, Vhdl, Verilog, Perl, and Tcl.
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