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John L. Email & Phone Number

Senior Project Manager, PMP Phase II at Dialog Semiconductor at Dialog Semiconductor
Location: Taipei City, Taiwan, Province of China 5 work roles 5 schools
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Senior Project Manager, PMP Phase II at Dialog Semiconductor
Location
Taipei City, Taiwan, Province of China
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John L. is listed as Senior Project Manager, PMP Phase II at Dialog Semiconductor at Dialog Semiconductor, a with 1790 employees, based in Taipei City, Taiwan, Province of China. AeroLeads shows a matched LinkedIn profile for John L..

John L. previously worked as Senior Project Manager, PMP Phase II at Dialog Semiconductor and Deputy Technical Manager, PMP at Ili Technology Corp.. John L. holds Executive Master Of Business Administration (Emba), Business Administration And Management, General, Gpa: 3.41 from Fudan University.

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Dialog Semiconductor

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About John L.

EXECUTIVE SUMMARY:- Expert in new product development with 13+ years of working in semiconductor industry. Experienced in power semiconductor market research and identify business landscapes.- Proven ability to manage multiple projects while met challenging deadline. Demonstrated with ability to work under stress. Experienced dealing with customer demand from: Apple, Sony SIE, Samsung, Xiaomi, Tianma, Spreadtrum and Huawei.- Solid engineering expertise in Analog/Mixed-mode IC design. Extensive hands-on experience in new circuits/algorithms specification development.- Align market strategy with Product life cycle and Technology adoption life cycle. (ASIC vs ASSP business).- Consider the impact on financial aspect for product development.

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Dialog Semiconductor
Dialog Semiconductor
Senior Project Manager, PMP Phase II at Dialog Semiconductor
reading, reading, united kingdom
Employees
1790
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5 roles · 22 years

John L. work experience

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Senior Project Manager, Pmp Phase Ii

Current

Taiwan

Work in a UK/German based fabless company, the main supplier of system Power Management IC for Apple Inc's iPhone/iPad. Partner closely with outsourced manufacturing subcontractors and focus on technical process issue in assembly. First point of contact person for major issues and lead cross-functional communication with internal teams and external ODMs/Vendors/customers during New Product Introduction (NPI) phase. • Develop project schedule, milestone and budget plan base on the business units' roadmap and customer expectation. Translate customer requirements and project goal into specific tasks.• Actively track and drive all tasks to closure. Communicate result to higher management.• Identify risks/issues/critical path early in the NPI phase and drive to resolution prior to ramp. • Review technical manufacture process/data. Understand SPC and process control. • Standardize operating procedure and enhance efficiency. Continuously review to make process streamlined to improve its effectiveness.• Work with multi-national functional units (Marketing, Planning, Product, Testing, Sustaining teams), communicate and resolve issue even in different geographical/time zones. • Involved in TSMC GaN product development project.

Jan 2014 - Present

Deputy Technical Manager, Pmp

Ili Technology Corp.

Taiwan

Employed by a fast-growing LCD display driver IC and Touch-Screen solution provider. Responsible for system planning and technical design for Touch Screen IC. • Led engineering validation team for Touch-Screen IC prior production.• Analyzed noise budge for Touch panel sensing system.• Co-worked with panel supplier for capacitive sensor design trade-offs performance/cost.• Bandgap voltage reference – Lead +/-3σprocess tolerant design with trimming/test-mode scheme. Performed non-ideal parameter, device offset and noise analysis.• High-Voltage flying capacitor charge-pump boost circuit.• Improved Touch IC Analog-Front-End, amplifier circuits and High-Voltage IO circuit. • Capacitive Stylus – Driving stylus product plan, signal process and algorithm architecture.

2012 - Jan 2014

Technical Deputy Principal, Project Leader

Key Stone Semiconductor

Taiwan

Project leader for Digital Radio (DAB) Baseband. Managed project schedule. Negotiated and resolved conflicts for limited resource in a start-up company.• Conducted chip planning – Estimate on cost and system budget. System derived in Matlab behavioral modeling; package selection and simulation; package pin definition; ESD and power/ground planning; digital/analog block merge; dummy density violation rule fixed-up, mask job deck view; Evaluation PCB floor-plan; product test plan etc.• Designed a hundred MHz ADC (Analog-to-Digital Converter) for multi-standards with cap-less LDO regulators. Designed an Audio DAC (Digital-to-Analog Converters) with embedded earphone power amplifier driver and digital volume control.

2010 - 2012 ~2 yrs

Senior Ic Design Engineer

Ralink Technology, Corp

Taiwan

Employed in a WIFI IC company providing solutions for routers and notebooks/dongles . Responsible for Baseband IC design and technical writing. Specialized in high resolution ADC/ DAC and worked closely with RFIC and baseband teams.• 11-bit Continuous-Time ΣΔADC – Designed Ralink’s first Sigma-Delta ADC for Bluetooth application. • 5-bit Continuous-Time ΣΔ ADC – Designed for Signal Strength Indicator.• Temperature sensing and signal strength indication – Designed a 12-bit Switched-Capacitor type ΣΔ ADC and Front-end circuitry.• LDO regulator – Designed 3.3v/1.5v regulated to 1.2v with >1A for digital circuitry.

2007 - 2010 ~3 yrs

Senior Engineer, Project Leader

United Microelectronics Corporation (Umc)

Taiwan

Belonged to Mixed-Mode IP (Intellectual Property) design department and provide license-free IP for customer interests in UMC foundry process. Designed Analog (spectre/hspice) and Digital (RTL) circuits for Audio DAC and ADC. Developed roadmaps for Audio IPs.• 16-bit audio ΣΔ DAC – Designed a low-power audio DAC using asymmetric PWM with 1.5-bit DAC and Analog filter for reduce analog area and power consumption. Familiar with Audio Precision and strong understanding in application. Translate specification to test items. Travelled to Japan for design review. • Temperature Sensor – Communicated with potential customers for merge IP into production design.• 45nm 3-bit ADC – Designed Flash ADC for process monitoring on wafer.

2005 - 2007 ~2 yrs
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5 education records

John L. education

Executive Master Of Business Administration (Emba), Business Administration And Management, General, Gpa: 3.41

National Taiwan University (Taipei, Taiwan) and Fudan University ( Shanghai, China) joint program Thesis: A Case-Based Study.

Executive Master Of Business Administration (Emba), Business Administration And Management, General, Gpa: 3.41

National Taiwan University (Taipei, Taiwan) and Fudan University ( Shanghai, China) joint program Thesis: A Case-Based Study.

Master Of Engineering Science, Electrical Engineering

Focus: Analog IC Design, Mixed-signals, DSP, MEMS and Finite Element Applications, RF electronic communication systems, Microelectronics.

Bachelor Of Engineering (B.E.), Mechatronics, Honors

Focus: Electronics, Electrical Engineering, Microprocessor, Artificial Intelligent, Control Engineering, Optical signal processing.

Education record

Microsoft Project 2010 Mcts
FAQ

Frequently asked questions about John L.

Quick answers generated from the profile data available on this page.

What company does John L. work for?

John L. works for Dialog Semiconductor.

What is John L.'s role at Dialog Semiconductor?

John L. is listed as Senior Project Manager, PMP Phase II at Dialog Semiconductor at Dialog Semiconductor.

Where is John L. based?

John L. is based in Taipei City, Taiwan, Province of China while working with Dialog Semiconductor.

What companies has John L. worked for?

John L. has worked for Dialog Semiconductor, Ili Technology Corp., Key Stone Semiconductor, Ralink Technology, Corp, and United Microelectronics Corporation (Umc).

Who are John L.'s colleagues at Dialog Semiconductor?

John L.'s colleagues at Dialog Semiconductor include Yuan-Wen Hsiao, 王立军, Federico Munoz, Jr Dizon, and Florian Feil.

How can I contact John L.?

You can use AeroLeads to view verified contact signals for John L. at Dialog Semiconductor, including work email, phone, and LinkedIn data when available.

What schools did John L. attend?

John L. holds Executive Master Of Business Administration (Emba), Business Administration And Management, General, Gpa: 3.41 from Fudan University.

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