As a Signal Integrity Engineer at Intel, I focus on ensuring the reliability and performance of high-speed PCB designs. My key responsibilities include:• HFSS Via Modeling and Crosstalk Simulations: I model Via TDR results in HFSS to optimize dimensions for single-ended and differential via antipads. My work on crosstalk simulations has led to the development of effective spacing rules for shielding via placement.• Low-Speed Channel Simulation: I utilize HSPICE and IBIS models to simulate low-speed interface channels, ensuring compliance with critical setup and hold time constraints to maintain signal integrity.• Layout Design Rule Checks (DRC): I meticulously examine PCB layouts, confirming adherence to signal integrity best practices, which is essential for the success of our designs. • Project SI Lead: In this role, I coordinate with design engineers and project managers to ensure that SI engineers have access to necessary design specifications and deadlines. I manage project progress to ensure timely completion of SI layout and topology checks.Through these efforts, I contribute to the development of high-quality, reliable products that meet Intel's performance standards.

During my internship as a Board Design Engineer at Intel, I gained hands-on experience in server board development and signal integrity validation. My key contributions included:• Signal Validation: I played a crucial role in conducting server board rework, assembly, and power-on procedures. Utilizing oscilloscopes, I performed measurements to ensure that timing and signal integrity specifications were met, allowing for the successful identification and documentation of power-on issues in prototype boards.• Component Sourcing: I assisted in multi-sourcing BOM components, ensuring compliance with Intel’s derating specifications. This experience enhanced my understanding of component selection and its impact on overall board performance.This internship provided me with valuable insights into hardware engineering and gave me hands-on experience testing and debugging prototype hardware.

As a Generator Design Intern at Meggitt PLC, I worked on developing tools to assist with the motor/generator design process. My key contributions included:• Generator Parametric Modeling Program: I developed a parametric geometry calculator for PMA motor/generator design, which facilitated finite-element modeling to compute power, core/winding loss, and efficiency under specified loads and RPMs.• Motor Inductance Tolerance Calculations: I engineered a simulation tool to analyze variations in motor inductance due to coil spacing discrepancies, enhancing the accuracy of our design processes.• Generator Design Project: I collaborated with a multidisciplinary team to ensure that our generator designs met electrical, weight, and thermal constraints, promoting the development of reliable and efficient products.From this internship, I gained experience with generator/power delivery systems, finite element modeling, and working with multi-disciplinary engineering teams.

• Provided tutoring in mathematics topics ranging from arithmetic to calculus, tailoring instructionalmethods to individual student learning styles.

Pulled and checked customer orders for accuracy, packaged orders for shipping, and assembled pressure washer components.