John Konstantine Email & Phone Number

Dearborn, Mi, Us

Stamford, Connecticut, Us

-Performed Signal Integrity Analysis in Hyperlynx for Infotainment prototype proof of concept board forOEM customer and for Fpdlink3 to OpenLDI display adapter board.-Used Mentor VX tools & EDM to access various schematics and PCB layouts.-Board BSP, bring up, and debug of various IOC micro-controllers (various S32Kxx, various RH850 micro-controllers, STM8, etc ..) using JTAG pods/Scope, Aardvark, and porting Harman BIOSBSP software C code. Board BSP. bring up, and debug of various SOC processors (IMx6x, Jacinto6,Jacinto7/TDA4x, Intel Apollo Lake, and Mediatek) using JTAG/Scope, Aardvark, UART, USB,Ethernet, and BSPporting of Uboot/LK bootloader/Harman BiosOnLinux/Yocto Embedded Linux.-Jacinto 6 DDR3 memory calibration code with updates to Uboot and helped Debug DDR3/LPDDR4SDRAM memory issues using Linux application memtester.-Jacinto 6 DDR3 memory calibration code with updates to QNX IPL and helped Debug DDR3SDRAM memory issues using QNX & memtester application which was ported to QNX.-Wrote IOC test scripts for debugging/bring up of various peripherals on IOC microcontrollers connectedby GPIO, I2C, SPI, UART, CAN, LIN, and A2B (MIC).-Wrote Linux bash scripts for debugging/bring up of various peripherals on SOC connected by GPIO,I2C, SPI, I2S/TDM, PCIe, UART, Ethernet, A2B (MIC), CSI-Mipi, FPDLInk3/4. GMSL2, and USB.-Wrote Linux bash scripts for USB2.0 Compliance testing.-Source code control for above test/debug software was using git and perforce.-Ported TI Bluetooth C code firmware to Harman BLE TI Bluetooth IC for a Harman front plate board.-Used/Adapted BlueZ in Linux for various Bluetooth chipsets (Marvel, Broadcom, and Infineon-Cyrpess)where I worked with Bluetooth chipset FAE to get custom port of firmware for Bluetooth IC.-Code updates to Lattice FPGA (Verilog) using Lattice Diamond software.

Southfield, Michigan, Us

Hardware & Software (Uboot bootloader & Linux BSP) for J6 & IMx6Q reference designs for IVI boards-utilizing J6 & IMx6Q, DDR3, OpenGL ES, SD_Cards, EMMC, QSPI NOR FLASH, DUART, CPLD, J6-MOST150/IMx6Q-MOST50, GPS, BT/Wifi, Ethernet, USB2.0, USB3.0, SATA, PCI-e, FPLINK3 LVDS, HDMI output,J6-HDMI input, & NTSC video input for a backup camera for OEM-Performed Schematic capture in Orcad (Mentor Dx/Viewdraw translation) (J6 CPU, IMx6Q CPU, DDR3, NOR FLASH, EMMC FLASH, SD_CARD, HDMI output, HDMI input, Ethernet, J6-DUART, CPLD, FPDLINK3 LVDS, GPS, BT/Wifi, USB, SATA, PCI-e, Power supplies, ...).-Performed DC/DC Switching Power supply design for a dual buck converter.-Performed Signal Integrity Analysis in Hyperlynx for the J6 & IMx6Q design with DDR3-fly by route, QSPI NOR FLASH, USB2.0, J6-USB3.0, J6-MOST150, IMx6Q-MOST50, EMMC, SD_CARD, PCI-e, HDMI, FPLINK3 LVDS, and Ethernet (RGMII). This included crosstalk, terminations of all the high-speed nets, drive strength control via register settings, impedance control of the nets and the PCB, and analysis via DDRx Wizard.-Wrote Board level JTAG Debugger initialization scripts for TI Code Composer & JTAG Pod for J6 and for IMx6Q using Lauterbach JTAG, & Trace32. -Performed board hardware debug/hardware bring up that included the writing & debugging of hardware initialization software for the target board using GCC/Uboot/Linux BSP using TI Code Composer & JTAG Pod for J6 and for IMx6Q using Lauterbach JTAG pod, gcc/eclipse/ltib .-Performed DDR3 SDRAM memory calibration & Stress test, wrote DDR3 initialization C code & JTAGDDR3 initialization script.-Ported Uboot Bootloader to J6 board using GCC & TI Code Composer & JTAG Pod and to IMx6Q board using Lauterbach JTAG pod, gcc/eclipse/ltib .-Ported BSP (Uboot & Embedded Linux BSP) to actual target hardware (modified Uboot,embedded Linux drivers, device tree, Kernel etc ...& integrated OpenGL ES 2.0)-CPLD/FPGA Logic design/porting for CPLD GPIO expander in Verilog.

Canton, Michigan, Us

MobileGT MPC5121e PowerPC reference design for TFT Instrument Cluster:* Performed Schematic capture in Mentor Dx/Viewdraw.* Performed Signal Integrity Analysis in Hyperlynx* Debuged & fixed DDR SDRAM memory & USB 2.0 issues* Performed DC/DC Switching Power supply design* Wrote Board level diagnostics in assembly & C using Codewarrior * Ported Uboot Bootloader & modified Embedded Linux BSP (modified Ltib, embedded Linux drivers, Kernel etc ...)Hardware reference design for a low End QVGA TFT instrument cluster with a PowerPC, FPGA, and a NTSC video input for a backup camera:• Performed Schematic capture in Mentor Dx/Viewdraw (PowerPC CPU, QSPI FLASH, FPGA, SDRAM, Power supplies, etc...).* Performed Signal Integrity Analysis in Hyperlynx• Performed DC/DC Switching Power supply design for several buck converters including core regulators.• Ported and integrated FPGA Verilog reference code from Altera using Altera Quartus to implement low end TFT LCD controller that had a ITU-656 input, hardware scalar, de-interlacer, memory controller, etc ...-Hardware reference design for a SVGA TFT instrument cluster utilizing an IMX534, DDR2 SDRAM, NOR FLASH, NTSC video input for a backup camera, MOST50, and LVDS for secondary remote heads up display (HUD):-Performed Schematic capture in Mentor Dx/Viewdraw (IMX534 CPU, DDR2 SDRAM, NOR FLASH, MOST50, USB, Video decoder, LVDS, Power supplies, etc...).-Performed DC/DC Switching Power supply design for several buck converters including core regulators.-Configured Redboot on Freescale IMX51 EVB & configured Freescale AG Linux via ltib to build working IMX51 embedded Linux image & root filesystems

Farmington Hills, Michigan, Us

* Performed Signal Integrity Analysis in Hyperlynx for @ 100% of Harman Becker Farmington Hills High Speed PCBs (over 30+ different PCB designs) where PCB boards are not allowed out of ECAD for fabrication/population until the PCB layout passes high speed Signal Integrity (SI) simulation which resulted in fewer prototype iterations and significant cost savings on builds. This included crosstalk, terminations of all the high-speed nets, drive strength control via register settings, and impedance control of the nets and the PCB.* Performed Schematic capture in Mentor Design Capture.* Helped Debug DDR SDRAM and SDRAM memory issues for DVD processor/decoders, FPGAs, and Blackfin DSPs. This included SI simulations, use of logic analyzer, and use of High-speed scope. * Helped to debug various issues on NTG4-MyGIG Navigation Radio and various DSP Amplifiers. (Memory, SDARS, GPS, USB2.0, SPI, LVDS, RS485, EMC and etc.).* Performed USB2.0 Compliance testing.

Van Buren Township, Mi, Us

-Technical Professional in Core Electronics responsible for the hardware design of main embedded processor boards for reference platforms for Infotainment Electronics for Navigation Radios with speech recognition (AutoPCs ICES & Voyager, Davinci, Picasso, and PicassoVM).-Performed Schematic capture in EPD Viewdraw/DX Designer-Performed CPLD/FPGA Logic design in Verilog-Performed Signal Integrity Analysis in Hyperlynx for @ 95% of Visteon High Speed PWBs (over 62different PCB designs) for @ six years where PCB boards were not allowed out of ECAD forfabrication/population until the PCB layout passed high speed Signal Integrity (SI) simulation whichresulted in fewer prototype iterations and significant cost savings on builds. This included crosstalk, termination of all the high-speed nets, and impedance control of the nets and the PCB.- Performed timing analysis in Timing Designer-Performed board hardware debug/hardware bring up along with software debug of hardware initializationcode.-Created Hardware Software Interface Specifications & Troubleshooting Debug/Repair documentation-Provided support to application engineers who applied these reference designs to products-Filed five invention disclosures and received the following three patents on Infotainment PowerManagement technologies:U.S. Patent No.6367022; Title: POWER MANAGEMENT FAULT STRATEGY FORAUTOMOTIVE MULTIMEDIA SYSTEMU.S. Patent No.6393573; Title: POWER MANAGEMENT FOR AUTOMOTIVE MULTIMEDIASYSTEMU.S. Patent No.6601176; Title: STRATEGY FOR IGNITION MANAGEMENT IN AUTOMOTIVECOMPUTER SYSTEMS-Performed BGA SMD Rework via AirVAC DR24S rework station and maintained the rework station

Dearborn, Michigan, Us

Telematics .Designed various 32 bit RISC/CISC/DSP Embedded microprocessor boards for use as Automotive Navigation Computers/Radio, AutoPCs, LCD display subsystems, and speech recognition Bluetooth systems. Designs included StrongARM SA1110, XSCALE, ARM9, ARM7, C55xx, C64x,MC68020, MC6833x, MC68HC12, and PowerPC processors, DRAM (EDO & Fast page mode), SDRAM, FLASH, CPLDs, FPGAs, USB, Codecs, IDE, CD & DVD ROMs, Compact FLASH ,TFT LCDs, LVDS, Bluetooth, GPS, Gyro, A/D, switching regulators ACP, CAN, MOST, and J1850. Designs involved schematic capture, FPGA/CPLD logic design (Verilog & VHDL), timing analysis, signal integrity analysis (High Speed digital), Spice analysis, and switching power supply design.

Ann Arbor, Michigan, Us

Lab instructor for Electronics Control Systems labs.

Developed computer software, hardware, and data package for a hydraulic cylinder test stand. Upgraded hardware and software of a computer controlled gyro test stand (ATE).

Msece, Electrical/Electronics & Computer Engineering

Bsee, Electrical/Electronics