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Jon Pimentel, Ph.D. Email & Phone Number

Senior CPU Design Engineer at NVIDIA 💻 | Chief Financial Officer and Founding Board Member of Hope for PDCD Foundation 🧬 at NVIDIA
Location: Greater Sacramento, United States, United States 9 work roles 3 schools
1 work email found @nvidia.com 2 phones found area 530 LinkedIn matched
✓ Verified Jun 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 2 phones

Work email j****@nvidia.com
Direct phone (530) ***-****
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Current company
Role
Senior CPU Design Engineer at NVIDIA 💻 | Chief Financial Officer and Founding Board Member of Hope for PDCD Foundation 🧬
Location
Greater Sacramento, United States, United States

Who is Jon Pimentel, Ph.D.? Overview

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Jon Pimentel, Ph.D. is listed as Senior CPU Design Engineer at NVIDIA 💻 | Chief Financial Officer and Founding Board Member of Hope for PDCD Foundation 🧬 at NVIDIA, based in Greater Sacramento, United States, United States. AeroLeads shows a work email signal at nvidia.com, phone signal with area code 530, and a matched LinkedIn profile for Jon Pimentel, Ph.D..

Jon Pimentel, Ph.D. previously worked as Senior CPU Design Engineer at Nvidia and Chief Financial Officer and Founding Board Member at Hope For Pdcd Foundation. Jon Pimentel, Ph.D. holds Ph.D., Electrical And Computer Engineering from University Of California, Davis.

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Email format at NVIDIA

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*@nvidia.com
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Profile bio

About Jon Pimentel, Ph.D.

Senior CPU Design Engineer at NVIDIA.Experienced microarchitect and power management design lead while at Intel. Working on manycore processors, power management IP, and neural network processors. Involved in microarchitecture development and specification, including architectural exploration. RTL owner of power management IP and features. Responsible for refining RTL to achieve target power, performance, area and timing goals.Graduated from University of California, Davis with Ph.D. in Electrical and Computer Engineering with focus on Digital Signals and Systems and Architectures and Biomedical Imaging. Author/Coauthor on ten publications in top IEEE conference and journal papers.Experienced with processor architecture, power management, floating-point and general computer arithemtic, VLSI, RTL and Logic Design, software development for many-core systems, and performance optimization. Skills include RTL coding (System Verilog and Verilog), computer architecture, C, C++, Python, MATLAB, static timing analysis, integer and floating point execution, experienced with simulators and waveform debugging tools, logic design principles along with timing and power implications, and low power microarchitectural and architectural techniques.

Listed skills include Matlab, Verilog, Computer Architecture, Signal Processing, and 45 others.

Current workplace

Jon Pimentel, Ph.D.'s current company

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NVIDIA
Nvidia
Senior CPU Design Engineer at NVIDIA 💻 | Chief Financial Officer and Founding Board Member of Hope for PDCD Foundation 🧬
Santa Clara, CA
Website
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9 roles

Jon Pimentel, Ph.D. work experience

A career timeline built from the work history available for this profile.

Senior Cpu Design Engineer

Current

Santa Clara, CA, US

Feb 2020 - Present

Chief Financial Officer And Founding Board Member

Current

Folsom, California, US

Rare disease advocacy organization focused on Pyruvate Dehydrogenase Complex Deficiency (PDCD). We support and fund the development of life-saving treatment for patients with PDCD. We also advocate for adding PDCD to the newborn screen and standardizing patient care.

Sep 2022 - Present

Silicon Architecture Engineer

Santa Clara, California, US

-Power Management Microarchitect and Design Lead-Defining architecture, reset, IP integration, clock crossing methodology, RTL coding, and debugging/root causing logic issues-Delivering ROI, complexity, and schedule for next generation projects-Microarchitecting Intel Nervana Neural Network Processors

Jan 2017 - Feb 2020

Research Assistant

Davis, California, US

-Developed area and power efficient sparse matrix multiplication kernels for manycore array-Developed area and power efficient synthetic aperture radar image formation engine-Designed hybrid floating point implementations with increasing throughput and reduced overhead

Sep 2009 - Dec 2016

Teaching Assistant

Davis, California, US

Teaching Assistant for Undergraduate Course EEC 180B - Digital Systems IICourse topics include: Computer-aided design of digital systems with emphasis on hardware description languages, logic synthesis, and field-programmable gate arrays (FPGA). Advanced topics in digital system design such as static timing analysis, pipelining, memory system design, and.

Mar 2016 - Jun 2016

Teaching Assistant

Davis, California, US

Teaching Assistant for Graduate Course EEC 281 - VLSI Digital Signal Processing-Holding weekly office hours-Proctoring examinations-Grading homeworks and examsCourse topics included: Digital signal processors, building blocks, and algorithms. Design and implementation of processor algorithms, architectures, control, functional units, and circuit topologies.

Jan 2015 - Mar 2015

Teaching Assistant

Davis, California, US

Teaching Assistant for Undergraduate Course EEC 180A - Digital Systems I-Organizing and conducting weekly laboratory sessions for twenty undergraduate students-Evaluating students’ lab reports and helping debug and design their circuits-Holding weekly office hours and proctoring examinationsCourse topics included: Course topics: Combinational logic design.

Sep 2012 - Dec 2012

Undergraduate Researcher

Davis, California, US

-Implemented several kernels to run on 36 core AsAP 1 chip-Wrote PERL test scripts for measuring various types of process variations-Measured, simulated and analyzed multi-core processor hardware and applications

Jan 2008 - Nov 2009

Graduate Technical Intern

Santa Clara, California, US

-RTL coding for next generation HPC project working on floating-point unit-Architecture definition-Mapping spec to microarchitecture implementation-Comparing area/power of various data paths

Sep 2013 - Dec 2013
Team & coworkers

Colleagues at NVIDIA

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3 education records

Jon Pimentel, Ph.D. education

Ph.D., Electrical And Computer Engineering

University Of California, Davis

Master Of Science (M.S.), Electrical And Computer Engineering

University Of California, Davis

Bachelor Of Science (B.S.), Electrical Engineering

University Of California, Davis
FAQ

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Quick answers generated from the profile data available on this page.

What company does Jon Pimentel, Ph.D. work for?

Jon Pimentel, Ph.D. works for NVIDIA.

What is Jon Pimentel, Ph.D.'s role at NVIDIA?

Jon Pimentel, Ph.D. is listed as Senior CPU Design Engineer at NVIDIA 💻 | Chief Financial Officer and Founding Board Member of Hope for PDCD Foundation 🧬 at NVIDIA.

What is Jon Pimentel, Ph.D.'s email address?

AeroLeads has found 1 work email signal at @nvidia.com for Jon Pimentel, Ph.D. at NVIDIA.

What is Jon Pimentel, Ph.D.'s phone number?

AeroLeads has found 2 phone signal(s) with area code 530 for Jon Pimentel, Ph.D. at NVIDIA.

Where is Jon Pimentel, Ph.D. based?

Jon Pimentel, Ph.D. is based in Greater Sacramento, United States, United States while working with NVIDIA.

What companies has Jon Pimentel, Ph.D. worked for?

Jon Pimentel, Ph.D. has worked for Nvidia, Hope For Pdcd Foundation, Intel Corporation, and Uc Davis.

Who are Jon Pimentel, Ph.D.'s colleagues at NVIDIA?

Jon Pimentel, Ph.D.'s colleagues at NVIDIA include Piyusha Mamdi, Ingrid Kelly, Veda Rao, Samantha U., and Thomas Müller.

How can I contact Jon Pimentel, Ph.D.?

You can use AeroLeads to view verified contact signals for Jon Pimentel, Ph.D. at NVIDIA, including work email, phone, and LinkedIn data when available.

What schools did Jon Pimentel, Ph.D. attend?

Jon Pimentel, Ph.D. holds Ph.D., Electrical And Computer Engineering from University Of California, Davis.

What skills is Jon Pimentel, Ph.D. known for?

Jon Pimentel, Ph.D. is listed with skills including Matlab, Verilog, Computer Architecture, Signal Processing, Perl, C++, C, and Vlsi.

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