Cyber Security and Engineering

(Software/Firmware/ASIC Work)- Designed and maintained system firmware, software and hardware for a high-profile development platform used by potential customers to leverage Lexmark's patented technologies. The firmware encompassed comprehensive functionalities, including sensor data acquisition from ADC, driving LCD displays, implementing PID loops for various closed-system controls, and more.- Developed a Windows GUI application to interface serially with the Lexmark development platform, enabling customers to modify settings and user profiles stored in microcontroller NVRAM.- Enhanced the signal integrity simulation environment by creating automating tools with Python, boosting workflow efficiency and product delivery by 10%. This simulation environment supports high-speed signal simulation for interfaces such as DRAM, RGMII, LVDS, PCI, and more during the design development cycle.- Assisted the ASIC team by developing System Verilog and C code for use in a UVM verification environment, ensuring thorough testing and debugging of DSP (Digital Signal Processing) Verilog RTL code. This RTL code is integral to synthesizing DSP hardware acceleration within the ASIC.- Received multiple Manager Appreciation Awards for effectively addressing and overcoming development challenges and accommodating customer requests.

Signal Integrity Engineer- Utilized IBIS and S-Parameter models for critical multi-card (and multi-layer PCBs) high-speed signal simulations and optimization using Mentor Hyperlynx. Simulations include LVDS, SPI, RGMII, FDP-link and other high-speed buses and signals.- Performed schematic entry, PCB layout and utilized Hypelynx high-speed simulation software to design various ASICs and flash memory interfaces. Design emphasizes on reducing electrical radiated emissions/increase immunity.- Performed capacitor decoupling simulations for various ASICs and high-speed IC's and optimized PCB and capacitor layout based on simulation results.- Collected differential and single ended S-parameters and impedance profiles for interconnects that were used in multi-card high-speed simulations. This included coax cables, FFC cables and FPCs on LCDs.Hardware Engineer- Designed advanced mixed signal systems such as high fidelity DAQs, test platforms, development hardware. This included planning, schematic entry, PCB layout, SPICE simulation and post system verification in the lab.- Designed voltage boost and buck regulators, including PCB layout. Post verification was performed with collecting phase margin data and load impulse response.- Coordinated with PCB and PCBA vendors for delivery of many high profile designs.- Collaborated with LCD vendors for projected capacitive touch designs, including OGS and GFF designs.- Tuned capacitive touch sensors (Microchip and Sitronix captouch IC's) to pass EMC IEC Conducted Immunity, Fast Transient, Radiated Emissions and Radiated Susceptibility.ASIC Verification Engineer- Performed UVM verification on ASIC DSP image blocks. The blocks include a custom interface for pixels and APB bus for register control.- Verified custom image DSP C code to compare with RTL signal interactions.- Debugged RTL issues with Synopsis Verdi GUI. Fixed some RTL issues that did not pass verification.- Contributed to the UVM testing infrastructure.

- Utilized Tensorflow and Pytorch to create Deep Neural Network models including Auto-encoders, Convolutional Neural Networks, Artificial Neural Networks and Recurrent Neural Networks for data classification and prediction.- Implemented many Supervised Machine Learning classifiers such as Decision Tree Classifiers, KNNs, Support Vector Machines and Linear Regression Perceptrons.- Implemented various Unsupervised Machine Learning models such as Expectation Maximization, kmeans, DBScan and Hierachical clustering by utilizing SKlearn library and Numpy.- Converted state-of-the-art Machine Learning Recent Temporal Pattern Mining algorithm from Python to C code for speed and efficiency. This included implementing inline functions and array vectorization techniques. Pattern mining was used to discover failure modes of ceramic toner heater from multivariate data.- Created Generative AI models using Generative Adversarial Networks with Tensorflow for image generation.- Implemented email Sentiment Analysis AI utilizing SKLearn KNN classifier. Utilized K-Fold training on the email dataset and optimized hyper-parameters for best possible accuracy, ROC and other metrics.- Performed Exploratory Analysis and Preprocessing (using Seaborn, matplotlib and Pandas) of multivariate Airline data to predict cancelled flights up to 3 days in advanced using various Machine Learning models from SKLearn. Best model was found by 1st tuning all model hyper-parameters and comparing one another with various metrics such as ROC, Accuracy, Recall, etc.

- Designed and implemented C code for various side channel countermeasures on custom security TPM IC's.- Developed C, C++ code and electrical hardware for security ICs on custom designed PCBs to test new countermeasures.- Reversed engineered cloned TPM I'Cs and gathered intelligence information such as data timing on exposed SPI and I2C communication lines, power consumption signatures and other side channel information to develop firmware/software countermeasures.- Researched and experimented new hardware and software countermeasures against cloned parts.

-Formulated an engineering test plans and procedures for electrical efficiency on GE front load washing machine products by analyzing real and reactive power.-Programmed various 32bit micro controllers such as the RX230, to perform various GPIO tasks during EMC testing.-Performed conducted immunity IEC 61000-4-2 testing on various demo boards.-Performed schematic entry and PCB layout (using Cadence) for developmental test cards and interconnect adapters.

-Used parametric testing computers/data collectors while coordinating with the engineering electrical and software team for module pre-validation testing.- Performed “9 point” (voltage vs. temperature) tests on transfer case control modules.-Performed power electrical transient experiments on transfer case modules.

-Engineered and implemented diode transient suppression circuitry for the MOSFET buffer IC’s pertaining to the Wurlitzer Opus 2005 digital interface on relay switch system.-Restored and delicately tested electrical components such as electromagnets in the electro-pneumatic pressure/electric system and complex mechanical relay switches.-Wired and extensively tested high profile organ restoration projects originating from different parts of the world: Sydney State Theatre's Wurlitzer organ and Petronas Concert Hall organ in Kuala Lumpur.