Joseph Mathis

Joseph Mathis Email and Phone Number

ANALOG VALIDATION ENGINEER at Intel Corporation @ Intel Corporation
(408) 765-8080
Joseph Mathis's Location
Beaverton, Oregon, United States, United States
Joseph Mathis's Contact Details

Joseph Mathis work email

Joseph Mathis personal email

n/a

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About Joseph Mathis

Presently, I am working as a Analog Validation Engineer. • Drive electrical validation of CPU High Speed I/O such as Thunderbolt/USB4 testing throughout product lifecycle (Pre-Si to Post-Production) using Design For Experiment (DFx) hooks.I also enjoy photographySpecialties: Board Design, Cadence Concept OrCAD , • Knowledge of interfaces UART, I2C, SPI, JTAG, DCI,

Joseph Mathis's Current Company Details
Intel Corporation

Intel Corporation

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ANALOG VALIDATION ENGINEER at Intel Corporation
(408) 765-8080
Website:
intel.com
Employees:
10
Joseph Mathis Work Experience Details
  • Intel Corporation
    Analog Validation Engineer
    Intel Corporation Jun 2019 - Present
    Santa Clara, California, Us
    • Drive electrical validation of CPU High Speed I/O such as Thunderbolt/USB4 testing throughout product lifecycle (Pre-Si to Post-Production) using Design For Experiment (DFx) hooks.• Generate reports for Design Of Experiments (DOE) collected and share these in with stakeholders in different internal/external to team forums.• I have worked with DDR, PCIe, typeC, Thunderbolt interfaces • Debug and drive silicon/IP issues to closure by working closely with design engineers.• Direct and train Lab Technicians to execute experiments.• Provide technical advice to Lab Technicians when troubleshooting platforms and test setup.• Generate test plans and execute against them.
  • Intel Corporation
    Anolog Lab Manager
    Intel Corporation Jun 2018 - Jun 2019
    Santa Clara, California, Us
    • Provided lab setup for CPU (five variations) validation.• Wrote instruction on lab setup (SOP).• Tested new thermal control devices worked with thermal design team to correct thermal problems. • Coordinate and scheduled lab staff. • Thought debug methodology and problem-solving on development boards.• Perform system debug and problem root cause analysis. • Identified a flaw in the production screening process.• Performed DDR memory debug and system testing on both client and server systems
  • Intel Corporation
    Analog Electrical Design Engineer
    Intel Corporation Oct 2000 - Jun 2018
    Santa Clara, California, Us
    • Board and CPU validation to ensure boards were working for all Functional Validation (FV) teams.• Collaborated with board designer to confirm boards would work for the team and FV circuits were installed correctly. • Actively participated in “Power On” ensuring the boards worked for all interfaces. • Performed quality assurance analysis on board schematics and layouts.• Worked with common hardware interfaces such as UART, I2C, SPI, JTAG, DCI• Created new re-work instructions on to fix or change board or CPU behaviors. • Facilitated training of the lab technicians to increase lab productivity. • Help build “second level” debug procedure for computer boards.• DDR memory testing that lead to timing issue with a vendor’s memory module• Experience on both client and server Platforms• DDR memory validation work in memory group
  • Notting Hill Condo Hoa
    Chairman
    Notting Hill Condo Hoa 2006 - Present
  • United States Navy
    Avionics Technician / Supervisor (E5)
    United States Navy Jun 1993 - May 1999
    Washington, Dc, Us
    • Maintain and update F/A-18 Hornet radar, weapons systems, communications, and flight electronics.• Served both on land (NAS Lemoore, California) and deployed on USS Constellation (VFA 151). • Supervised AT Shop personnel (5-10) including delegation of duties, training, and shift coordination.• Obtained CDI certification• Reported to senior staff and officers about aircraft status and safety.
  • The Charles Stark Draper Laboratory, Inc.
    Intern
    The Charles Stark Draper Laboratory, Inc. 1986 - 1988
    Programming in Fortran

Joseph Mathis Skills

Semiconductors Photography

Joseph Mathis Education Details

  • Northeastern University
    Northeastern University
    Electrical Engineering
  • Community College Of Rhode Island
    Community College Of Rhode Island
    Liberal Arts

Frequently Asked Questions about Joseph Mathis

What company does Joseph Mathis work for?

Joseph Mathis works for Intel Corporation

What is Joseph Mathis's role at the current company?

Joseph Mathis's current role is ANALOG VALIDATION ENGINEER at Intel Corporation.

What is Joseph Mathis's email address?

Joseph Mathis's email address is jo****@****tel.com

What is Joseph Mathis's direct phone number?

Joseph Mathis's direct phone number is +150381*****

What schools did Joseph Mathis attend?

Joseph Mathis attended Northeastern University, Community College Of Rhode Island.

What are some of Joseph Mathis's interests?

Joseph Mathis has interest in Robotics, Weight Trainning, Photography, Health And Wellness, Swimming, Movies, Magnetics And Solar Power.

What skills is Joseph Mathis known for?

Joseph Mathis has skills like Semiconductors, Photography.

Who are Joseph Mathis's colleagues?

Joseph Mathis's colleagues are Kelvin Yao, Nandita Lakshminarayanan, Alexandra Cowie, Manos Manias, Reshmi Dani, Mounica Yerranagula, Lizeth Sanchez.

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