AeroLeads people directory · profile

Joseph Mathis Email & Phone Number

ANALOG VALIDATION ENGINEER at Intel Corporation
Location: Beaverton, Oregon, United States 6 work roles 2 schools
1 work email found @intel.com 2 phones found area 503 and 408 LinkedIn matched
✓ Verified Jun 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 2 phones

Work email j****@intel.com
Direct phone (503) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Intel Corporation
Role
ANALOG VALIDATION ENGINEER
Location
Beaverton, Oregon, United States
Company size
10 employees

Who is Joseph Mathis? Overview

A concise factual answer block for searchers comparing this professional profile.

Quick answer

Joseph Mathis is listed as ANALOG VALIDATION ENGINEER at Intel Corporation, a company with 10 employees, based in Beaverton, Oregon, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 503, 408, and a matched LinkedIn profile for Joseph Mathis.

Joseph Mathis previously worked as Anolog Lab Manager at Intel Corporation and ANALOG ELECTRICAL DESIGN ENGINEER at Intel Corporation. Joseph Mathis holds Bs, Electrical Engineering from Northeastern University.

Company email context

Email format at Intel Corporation

This section adds company-level context without repeating Joseph Mathis's masked contact details.

{first}.{last}@intel.com
89% confidence

AeroLeads found 1 current-domain work email signal for Joseph Mathis. Compare company email patterns before reaching out.

View email format View company profile Management contacts
Profile bio

About Joseph Mathis

Presently, I am working as a Analog Validation Engineer. • Drive electrical validation of CPU High Speed I/O such as Thunderbolt/USB4 testing throughout product lifecycle (Pre-Si to Post-Production) using Design For Experiment (DFx) hooks.I also enjoy photographySpecialties: Board Design, Cadence Concept OrCAD , • Knowledge of interfaces UART, I2C, SPI, JTAG, DCI,

Listed skills include Semiconductors and Photography.

Current workplace

Joseph Mathis's current company

Company context helps verify the profile and gives searchers a useful next step.

Intel Corporation
Intel Corporation
ANALOG VALIDATION ENGINEER
(408) 765-8080
Website
intel.com
Employees
10
AeroLeads page
Company profile
View company profile Email format
6 roles · 40 years

Joseph Mathis work experience

A career timeline built from the work history available for this profile.

Analog Validation Engineer

Current
Intel Corporation

Santa Clara, California, US

  • Drive electrical validation of CPU High Speed I/O such as Thunderbolt/USB4 testing throughout product lifecycle (Pre-Si to Post-Production) using Design For Experiment (DFx) hooks.
  • Generate reports for Design Of Experiments (DOE) collected and share these in with stakeholders in different internal/external to team forums.
  • I have worked with DDR, PCIe, typeC, Thunderbolt interfaces
  • Debug and drive silicon/IP issues to closure by working closely with design engineers.
  • Direct and train Lab Technicians to execute experiments.
  • Provide technical advice to Lab Technicians when troubleshooting platforms and test setup.
Jun 2019 - Present

Anolog Lab Manager

Intel Corporation

Santa Clara, California, US

  • Provided lab setup for CPU (five variations) validation.
  • Wrote instruction on lab setup (SOP).
  • Tested new thermal control devices worked with thermal design team to correct thermal problems.
  • Coordinate and scheduled lab staff.
  • Thought debug methodology and problem-solving on development boards.
  • Perform system debug and problem root cause analysis.
Jun 2018 - Jun 2019

Analog Electrical Design Engineer

Intel Corporation

Santa Clara, California, US

  • Board and CPU validation to ensure boards were working for all Functional Validation (FV) teams.
  • Collaborated with board designer to confirm boards would work for the team and FV circuits were installed correctly.
  • Actively participated in “Power On” ensuring the boards worked for all interfaces.
  • Performed quality assurance analysis on board schematics and layouts.
  • Worked with common hardware interfaces such as UART, I2C, SPI, JTAG, DCI
  • Created new re-work instructions on to fix or change board or CPU behaviors.
Oct 2000 - Jun 2018

Chairman

Notting Hill Condo Hoa

Avionics Technician / Supervisor (E5)

United States Navy

Washington, DC, US

  • Maintain and update F/A-18 Hornet radar, weapons systems, communications, and flight electronics.
  • Served both on land (NAS Lemoore, California) and deployed on USS Constellation (VFA 151).
  • Supervised AT Shop personnel (5-10) including delegation of duties, training, and shift coordination.
  • Obtained CDI certification
  • Reported to senior staff and officers about aircraft status and safety.
Jun 1993 - May 1999

Intern

The Charles Stark Draper Laboratory, Inc.

Programming in Fortran

1986 - 1988 ~2 yrs
Team & coworkers

Colleagues at Intel Corporation

Other employees you can reach at intel.com. View company contacts for 10 employees →

JW Jp Weng Jp Weng Colleague at Intel CorporationSaratoga, California, United States, United States View → JS Jitender Saini Jitender Saini Colleague at Intel CorporationBengaluru, Karnataka, India, India View → MB Monika Bahyrycz Monika Bahyrycz Colleague at Intel CorporationGdańsk, Pomorskie, Poland, Poland View → DL Daisy Lee Daisy Lee Colleague at Intel CorporationTaiwan, Taiwan, Province Of China View → SG Sravanthi Gandham, P.E Sravanthi Gandham, P.E Colleague at Intel CorporationPortland, Oregon, United States, United States View → SM Sriram Mukund Sriram Mukund Colleague at Intel CorporationGreater Boston, United States, United States View → IK Ilan Kor Sade Ilan Kor Sade Colleague at Intel CorporationIsrael, Israel View → DS Dennis Sanders Dennis Sanders Colleague at Intel CorporationAlbuquerque, New Mexico, United States, United States View → JR John Rubio John Rubio Colleague at Intel CorporationFolsom, California, United States, United States View → NE Noam Etzion Noam Etzion Colleague at Intel CorporationHaifa, Haifa District, Israel, Israel View →
2 education records

Joseph Mathis education

Bs, Electrical Engineering

Northeastern University

Aa, Liberal Arts

Community College Of Rhode Island
FAQ

Frequently asked questions about Joseph Mathis

Quick answers generated from the profile data available on this page.

What company does Joseph Mathis work for?

Joseph Mathis works for Intel Corporation.

What is Joseph Mathis's role at Intel Corporation?

Joseph Mathis is listed as ANALOG VALIDATION ENGINEER at Intel Corporation.

What is Joseph Mathis's email address?

AeroLeads has found 1 work email signal at @intel.com for Joseph Mathis at Intel Corporation.

What is Joseph Mathis's phone number?

AeroLeads has found 2 phone signal(s) with area code 503, 408 for Joseph Mathis at Intel Corporation.

Where is Joseph Mathis based?

Joseph Mathis is based in Beaverton, Oregon, United States while working with Intel Corporation.

What companies has Joseph Mathis worked for?

Joseph Mathis has worked for Intel Corporation, Notting Hill Condo Hoa, United States Navy, and The Charles Stark Draper Laboratory, Inc..

Who are Joseph Mathis's colleagues at Intel Corporation?

Joseph Mathis's colleagues at Intel Corporation include Jp Weng, Jitender Saini, Monika Bahyrycz, Daisy Lee, and Sravanthi Gandham, P.E.

How can I contact Joseph Mathis?

You can use AeroLeads to view verified contact signals for Joseph Mathis at Intel Corporation, including work email, phone, and LinkedIn data when available.

What schools did Joseph Mathis attend?

Joseph Mathis holds Bs, Electrical Engineering from Northeastern University.

What skills is Joseph Mathis known for?

Joseph Mathis is listed with skills including Semiconductors and Photography.

Find 750M verified contacts

Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.