Jyothishri G R
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Jyothishri G R Email & Phone Number

Lead Design Engineer at Cadence Design Systems at Cadence Design Systems
Location: Bengaluru, Karnataka, India 4 work roles 1 school
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Current company
Cadence Design Systems
Role
Lead Design Engineer at Cadence Design Systems
Location
Bengaluru, Karnataka, India
Company size
10 employees

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Jyothishri G R is listed as Lead Design Engineer at Cadence Design Systems at Cadence Design Systems, a company with 10 employees, based in Bengaluru, Karnataka, India. AeroLeads shows a matched LinkedIn profile for Jyothishri G R.

Jyothishri G R previously worked as Design Engineer at Cadence Design Systems and Consultant- Digital Design Engineer at Cadence Design Systems. Jyothishri G R holds Master'S Degree, Vlsi Design from Vellore Institute Of Technology.

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Cadence Design Systems

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Profile bio

About Jyothishri G R

Experience in the field of Circuit Design, IR/EM analysis, Verilog Modelling and Characterisation of IO cells (.libs) . Enthusiastic engineering professional with a Master's Degree focused in VLSI Design from Vellore Institute of Technology.

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Jyothishri G R's current company

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Cadence Design Systems
Cadence Design Systems
Lead Design Engineer at Cadence Design Systems
sweden
Website
cadence.se
Employees
10
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4 roles

Jyothishri G R work experience

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Design Engineer

Current
Cadence Design Systems

Bengaluru Area, India

  • Schematic Design of POC, Voltage Reference generator, Perform various Performance and Reliability checks across PVT.
  • Responsible for analysis of Electro-migration and IR drop for DDRIO high speed circuits of Advanced Process nodes.
  • Developing customized process automation solutions for design flow procedures using Shell Scripting
Jan 2018 - Present

Consultant- Digital Design Engineer

Cadence Design Systems

Bengaluru Area, India

  • Experience in Behavioral modelling of IO blocks, functionality checks with NC Verilog Simulator, Basics of wreal modelling (Verilog AMS).
  • Worked on including essential Timing checks in Verilog models as obtained from. libs, Basic working knowledge of characterization.
  • Projects: Architectural design(Verilog) of DDRIO blocks.
  • Good Understanding of design implementation flow and tools, Good Scripting skills.
Jun 2016 - Dec 2017

Intern

Cadence Design Systems

Bengaluru Area, India

Responsibilities include exploring tool options and pass the same information to designers through Structured Course Materials, deal with any course related issues of the customer.

May 2015 - May 2016

Intern

Nielit

Chennai

  • In this project, Gate-Length Biasing technique is employed for the Low Leakage Power Design of a Basic Inverter Cell.
  • 90nm technology was used and the modified cells were used in an ALU design to show that this technique can be used for slightly complex designs too. The results show a reduction in leakage power up to 38% with less.
Nov 2014 - Apr 2015
Team & coworkers

Colleagues at Cadence Design Systems

Other employees you can reach at cadence.se. View company contacts for 10 employees →

AV Archana Vyas Archana Vyas Colleague at Cadence Design Systems Faridabad, Haryana, India, India View → AG Anna Gniza Anna Gniza Colleague at Cadence Design Systems Katowice, Śląskie, Poland, Poland View → AA Asvin-Ray Amalanayagam Asvin-Ray Amalanayagam Colleague at Cadence Design Systems Viroflay, Île-de-France, France, France View → OO Olivier Omedes Olivier Omedes Colleague at Cadence Design Systems Greater Nice Metropolitan Area, France View → XX Xingrong Xiong Xingrong Xiong Colleague at Cadence Design Systems Campbell, California, United States, United States View → AS Amit Strauss Amit Strauss Colleague at Cadence Design Systems Israel, Israel View → VK Vikas Khanna Vikas Khanna Colleague at Cadence Design Systems Delhi, India, India View → GS Ganapathy Subramanyan E Kumar Ganapathy Subramanyan E Kumar Colleague at Cadence Design Systems Bengaluru, Karnataka, India, India View → TH Takashi Hidai Takashi Hidai Colleague at Cadence Design Systems San Francisco Bay Area, United States View → AK Ashutosh Kumar Gupta Ashutosh Kumar Gupta Colleague at Cadence Design Systems Kolkata, West Bengal, India, India View →
1 education record

Jyothishri G R education

FAQ

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Quick answers generated from the profile data available on this page.

What company does Jyothishri G R work for?

Jyothishri G R works for Cadence Design Systems.

What is Jyothishri G R's role at Cadence Design Systems?

Jyothishri G R is listed as Lead Design Engineer at Cadence Design Systems at Cadence Design Systems.

Where is Jyothishri G R based?

Jyothishri G R is based in Bengaluru, Karnataka, India while working with Cadence Design Systems.

What companies has Jyothishri G R worked for?

Jyothishri G R has worked for Cadence Design Systems and Nielit.

Who are Jyothishri G R's colleagues at Cadence Design Systems?

Jyothishri G R's colleagues at Cadence Design Systems include Archana Vyas, Anna Gniza, Asvin-Ray Amalanayagam, Olivier Omedes, and Xingrong Xiong.

How can I contact Jyothishri G R?

You can use AeroLeads to view verified contact signals for Jyothishri G R at Cadence Design Systems, including work email, phone, and LinkedIn data when available.

What schools did Jyothishri G R attend?

Jyothishri G R holds Master'S Degree, Vlsi Design from Vellore Institute Of Technology.

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