M.Tech (VLSI-System Design) from JNTUA, Anantapuramu.Intern Technical at DRDO (Defence Research and Development Organization), Hyderabad.Ability in learning new concepts quickly, working well under pressure and communicating ideas effectivelyCurrently working in Micro semi CorporationDuration: 7-Nov-2016 to PresentJob title: Intern->During this intern I have learnt Ethernet protocol study such as frame format, switch concepts, bridges, hubs, and repeaters.->Learnt QOS protocol study and validated some test cases on a switch.->Currently learning MACsec technology such as (IEEE802.1x2010, IEEE802.1AE standards).Completed Professional Development program, in VLSI Design and verification, from Sandeepani School of VLSI Design.Completed my M. Tech‐final year‐ internship at ANURAG (DRDO) Hyderabad for the period of 9 months. During internship I built the Verification environment for DVB-SH IP by using UVM methodology.Verification of A DVB-SH IPDescription: The aim of the project is to verify DVBSH IP (Digital Video Broadcasting satellite to handheld services Internet protocol) by using UVM methodology, i.e. developing the verification environment for the given design using UVM components and constraint random based verification techniques.Software Tools: Synopsys