Keith Donegan Email & Phone Number

Albany, New York, United States

• Lead engineer for development of 21nm and 24nm-pitch BEOLsingle-damascene levels using SALELE patterning
• Responsible for development of BEOL metal layers, including Mandrel,Non-Mandrel and Cut processes
• Responsible for process development and improvement using advancedmetrology, in-line defectivity and imaging techniques
• Creation of Design of Experiments in keeping with yield goals andcontinuous improvement plan for BEOL modules
• Conceptualization and design of electrical macros to study andunderstand process window of BEOL metal interconnects
• Driver of yield enhancement by analyzing failing electrical parametersand rapidly data mining to investigate root causes

Malta, New York, United States

• Lead engineer for development of far-BEOL features (V-Groove, LaserCavity, Edge Facet) to enable both active and passive light-coupling to45nm Monolithic Silicon Photonics devices and establishmanufacturability
• Lead interface between process development and characterizationengineers, and support to device designers on Silicon Photonics processdevelopment
• Spearheaded effort to implement process changes in V-Groove modulein order to pass Damp Heat Reliability testing
• Close collaboration with patterning modules to expand process window;including litho, etch and Optical Proximity Correction (OPC) groups, tounderstand and improve on process weak-points
• Single-Damascene Layer Owner for 40nm-pitch technologies utilizingSelf-Aligned Double Patterning (SADP)
• Development lead for 40nm-pitch, single damascene processdevelopment and process window expansion

Dresden, Saxony, Germany

• Single-Damascene Layer (Metal-1) Owner for 28nm (90nm-pitch)technologies and for 22nm development (80nm-pitch)
• Development and implementation of wafer uniformity improvementstrategy leading to 5% yield gains for high volume 28nm products
• Development lead for first double-patterning layer in GlobalFoundriesFAB1
• Preparation and presentation of data packages meeting Qualitystandards in order to implement process changes in development
• Focus on technology ramp, new product introductions, performance andyield improvement, wafer scrap reduction, cycle time reduction, processimprovement, and other KPI improvements
• Ownership and upkeep of FMEA documents specific to layerProject Lead - Lithography Rework Processes for BEOL and Far-BEOL metallayers

Doctor Of Philosophy - Phd, Materials Chemistry

Bachelor Of Science:, Chemical Sciences