Kunal Das Email & Phone Number

Currently working on GPIO

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  Analog Layout Design Engineer

  Arf Design Pvt Ltd

  May 2022 - Present - Ranchi

  • 2 yrs of experience in Analog Layout Design.• Good exposure in 5nm, 12nm, 22nm, 45nm and 130 nm technology node.• Experience in Analog Mixed Signal layout, Standard Cell layout design, Current mirror, Differential pair, Op-amp, bias gen, Vreg amplifier, Full adder, Half adder, D flip flop, Multiplexer, Level shifter etc.• Hands on experience in IC verification terminologies DRC, LVS, Compatibility rules.• Device matching using Inter digitization and Common-Centroid methods, metal density and parasitic analysis.• Good knowledge in Layout failure mechanisms such as Electro-migration, Antenna Effect, Latch-up, IR drop, ESD and Deep N-well concepts, Well Proximity and STI.• Good knowledge and understanding in Floor planning, Placement of blocks, Routing of signals and Shielding the critical signals.

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  Hooghly Engineering And Technology College

  Electrical Engineering