Felipe Almeida Email & Phone Number

Paris, Fr

Düsseldorf, North Rhine-Westphalia, Germany

Tallinn

Evaluate the interplay of Security techniques with Reliability goalsHow redundant computations schemes can still be deployed without increase of side-channel traces

Torino

Test and Diagnosis of Digital Circuits and SystemsFault Tolerant Digital Circuit and System Design

Campinas Area, Brazil

Physical Design Leader of CPqD Design Center

Porto Alegre Area, Brazil

• Teach Physical Synthesis Flow using Cadence design tools for Latin American Students,• Development and simulation of hardware description (Verilog/VHDL) for ASICs,• Support to Brazilian Design Houses.• Download, installation and qualification of PDKs from XFAB and UMC,• Software tools: Cadence First Encounter, Voltage Storm, Encounter Power System, QRC Extraction, RTL compiler.

São Paulo Area, Brazil

• Responsible for all phases of the project of a chip for the footwear sector.• Designed and implemented using the Verilog language• Created a verification plan and a verification environment

Porto Alegre Area, Brazil

• Responsible for all phases of the project of a chip for the footwear sector.• Designed and implemented using the Verilog language• Created a verification plan and a verification environment

Recife Area, Brazil

• Co-administration proactive of client’s networks. Responsible for identification of vulnerabilities and/or conformists, performing maintenance continues of information security• Monitoring logs and events from various network assets in real time. Identifying patterns of behavior that may reveal security vulnerabilities or attacks, reporting and following up with the client possible resolutions of the failures found

Recife Area, Brazil

• Responsible for administration and maintenance of Linux servers, firewalls and automation routines

Master'S Degree, Microelectronic

Dissertation: Evaluating Placement Constraints and Majority Voter Insertion Techniques in Triple Modular Redundancy Architectures.

Digital Ic Designer, Integrated Circuits Design

Engineer, Computer Engineering