PHFS Lents Center - Family Shelter - Portland, OregonThe Portland Building - Temporary Relocation Tenant Improvement - Portland, OregonVictorian Court - Senior Housing Renovation (21 units) - Scappoose, OregonBridge Meadows Beaverton - Inter-generational Housing New Construction (41 units) - Beaverton, OregonRobert Lindsey Tower - Senior Housing Renovation (66 units) - Salem, Oregon - Salem Housing AuthorityParkway Village - Affordable Multi-Family Housing Renovation (124 units) - Salem, Oregon - Salem Housing Authority

Oregon Consolidated Funding Cycle (CFC) Applications. Role: Prepared all drawings for five affordable housing CFC Applications: one new construction project and four rehabilitation projects. Two rehabilitation projects were funded.Easton Ridge Apartments, Happy Valley, Oregon. Rehabilitation of 264-unit affordable housing apartment complex. Role: Design development through construction documents.Greenview Terrace Apartments, Portland, Oregon. Rehabilitation of 31-unit affordable housing apartment complex. Role: Pre-design through construction documents.Cascadia Behavioral Health Capital Needs Assessments. Capital Needs Assessment reports for 14 mental health facilities. Role: On-site needs assessments, data organization, and report writing for all 14 reports.

Pre-Design through CA. Proposals. 3D modeling. Computer support. Feasibility studies. Presentation boards and packages. Land use applications. Zoning and building code review. Product research.

Computer and printer technical support.

Research of future development options for Energy Scheming Program. Prototype of daylight zone computer game (uoregon.edu/~esbl/ZoneGame) and paper mockup.

UofO-specific LEED templates for new major construction. Diagrams for new building. Scenarios for science laboratory remodels. Space-planning tasks. Planning Office website.

Edited AutoCAD drafting documents as part of 2-person architecture firm. All work conducted in Spanish.

Software engineering tasks including: Linux system integration; investigation, design, and development of performance database; investigation, design, and development of device drivers; documentation, troubleshooting, debugging, and issue resolution. Liaison to Dassault Systemes in France, including 3 months in Suresnes, France, porting CATIA from Fortran77 to Fortran90.

Worked on teams to complete the design of three separate graphics ASICs: a host-interface chip, a texture-mapping chip, and a raster-texture chip. Investigation phase; C model design, simulation and test; Verilog model design, simulation, test; synthesis and timing verification; hardware turnon; manufacturing diagnostics planning and development.