Manoj Chopra Email and Phone Number
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Results driven seasoned professional with an extensive background in Memory Storage Manufacturing, Technology development, and Product and Program launches in Asia and the US. I am passionate about innovation and high-volume Manufacturing Operations, Engineering, Product and Process development. Proven track record of successfully leading teams to achieve major business metrics such as Cost, Quality, Time to Market, Time to Volume and Yields. Achieving, Cost targets quarter to quarter along with maintaining sound customer relationships. Key strengths are my technical abilities with proven and disciplined problem-solving techniques. Some of my accomplishments include:• Moving High Volume Manufacturing site from North America to the Philippines• Unification of legacy technologies from two fortune 500 companies to one • Ramping these brownfield operations in the Philippines to the current $10B revenue operation• Improving internal yields by over 25%• Creating a high performing culture within the engineering team to ensure smooth operations• Key Technical resource for Asian Operations.• Introduction of Key technology introductions to Asia such as Energy Assisted Magnetic Recording
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Senior Director Wafer SystemsWestern Digital Jul 2022 - PresentSan Francisco Bay AreaLeading the unification of the legacy Read rite and IBM wafer fabs by unifying the Wafer systems. This includes a Common MES deployment for both Fabs while running the Fabs at full capacity, Driving operational efficiency with Gen-AI and Augmented reality, Virtual Metrology, IIOT to name a few. Unifying Automation systems. This Synergy has already led to over $25M/Yr savings in cost efficiencies with more to come. -
Director Wafer ProjectsWestern Digital Jun 2019 - Jun 2022Leading the team to deploy Camstar Manufacturing Execution System to unify wafer flow between WDC's wafer sites in Great Oaks and Fremont.Improving operational efficiencies in the wafer process to reduce cycle time and improve the cycles of learning.
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Director Contamination,Esd And Customer InterfaceWestern Digital Dec 2018 - Jun 2019San Jose, CaAfter relocating back to the US. I am remotely managing China, Thailand, and the Philippines as related to customer related issues, Second sourcing and cost reductions with frequent trips to the above geographies. In conjunction, I am intimately involved with Reliability and field issues since I have an extensive background in it
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Dir Of Slider Fab Process Engg ( Hgst Philippines)Hgst, A Western Digital Company Jan 2009 - Aug 2022Responsible for Statistical process control and its executionOverall responsibility for Lapping, cutting, grinding, cleaning and inspectionOverall responsibility of a group of approx 200+ engg’s and techs with operational responsibility of over 300+ directs.Instrumental in cost, capacity and yield improvementsInstrumental in the implementation of new technologies in Mass productionTechnical resource for FA, physical and chemical characterization and process engineering -
Dir Of Failure Analysis And Materials Science Labs( Hgst Philippines)Hgst, A Western Digital Company Jan 2008 - Jan 2009Setup the FA group. This group was the customer facing group involved in various customer issues which eventually drove improvements in the slider fab processHelped in the integration of FA and MSL. Created the training programs for the FA and MSL teams to help further the growth and development of the teams.
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Director Of Slider Fab DevelopmentHgst, A Western Digital Company Jan 2007 - Jan 2008Worked with counterparts in US and Japan and led these cross functional teams to help accelerate the adoption of new technologies into Mass production. Key technologies involved lapping technologies, plate technologies and photo lithography and etch ( Ion beam and RIE) processes
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Sr. Head Development EngineerHgst, A Western Digital Company Jan 2005 - Jan 2007Development of head cleaning processes for Slider fabrication. Processes involve using a broad based skill set ranging from solvent clean, Aqueous clean, contamination prevention, corrosion inhibitors, Impact based cleans, US/MS based cleans for the demanding environments seen by the read and write sensorsDeveloped and implemented in volume production, new technologies which improved slider yields by 6%
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Manager Of Desktop Process EngineeringHgst, A Western Digital Company Jan 2003 - Jan 2005Aided and led the team which designed and developed the processes for the 80GB, 120GB and 160GB media platters.Introduced new processes and process tools into the manufacturing linesInteracted with the customer on a weekly basis to ensure requisite changes were made to the product to ensure product qualificationPart of a World Wide task force which eliminated a major HDD reliability issue which saved millions of dollars for the company hence securing the major customer accounts for HGST.Actively engaged in the ramp of a new media facility in Shenzen, China.
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Manager Of The Process Integration TeamHgst, A Western Digital Company Jan 2002 - Jan 2003Reported to the Director and the General Manager of Media development Improved the Overall manufacturing Yields across all products (65mm, 84mm and 95mm) by 5% which improved profitability by over 5million dollars.Instrumental in bringing development products into manufacturing and ramping them into high volume production
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Manager Of Individual Disk ProcessesIbm Jan 1999 - Jan 2002Responsible for pre wash /Disk pre cleaning Implemented major reforms in cleaning methodology and its control to eliminate a major source of HDD reliability failure (delaminations). This saved three generations of server class programs from extinctionLed the Worldwide team for prewash, lube and FTP. Was the major liaison with the German teamsPivotal in improving yields for the 40GB per platter disk by 55% saving millions of dollars in scrap costsImplemented into volume production various wash recipes and further improved on them to ensure manufacturability.Manager of Individual disk processes (contd..)Implemented new lubricants to the manufacturing line along with process improvementsDeveloped and implemented new process and tooling at FTP ( Final tape polish) which improved overall yields by 25% on all products -
Disk Development EngineerIbm Jan 1998 - Jan 1999Disk Reliability and PSP ( Post sputter process ) Engineer Sustained the manufacturing monitoring techniques for disk reliability.Developed new characterization techniques for PSP which improved the overall understanding of disk burnishImplemented new processes which improved overall disk yields saving millions in scrap cost Implemented new burnish techniques and tools which improved overall disk yieldsInterfaced and worked closely with Almaden research center to better understand the effect of media interface and flying slidersPatented a new method and tool for understanding burnish tapes
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Principal EngineerMicropolis Usa Jan 1997 - Jan 1998Developed and implemented a novel processing technique to reduce flying stictionImplemented this new technique in HDD manufacturing at Micropolis Singapore. Patented the novel method of HSA processing
Manoj Chopra Skills
Manoj Chopra Education Details
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Columbia UniversityMaterials Science -
University Of California, Santa Cruz ExtensionA
Frequently Asked Questions about Manoj Chopra
What company does Manoj Chopra work for?
Manoj Chopra works for Western Digital
What is Manoj Chopra's role at the current company?
Manoj Chopra's current role is Sr. Director Wafer Systems at Western Digital.
What is Manoj Chopra's email address?
Manoj Chopra's email address is ma****@****ail.com
What schools did Manoj Chopra attend?
Manoj Chopra attended Columbia University, University Of California, Santa Cruz Extension, Punjab Engineering College.
What are some of Manoj Chopra's interests?
Manoj Chopra has interest in Community, 2mtinykitchen, School, Educational Consultant, Golf Galaxy, Turtle Vines, Coach, Nonprofit Organization, Sabarimala Temple, Outdoor And Sporting Goods Company.
What skills is Manoj Chopra known for?
Manoj Chopra has skills like Etching, Device Physics, Nanofabrication, Jmp, Thin Films, Physics, Failure Analysis, Characterization, Materials Science, Manufacturing, Simulations, Photolithography.
Who are Manoj Chopra's colleagues?
Manoj Chopra's colleagues are Meimei Han, Manikandan T, Milton Caballero, Chris Warriner, Arslanjutt Juttge, Andreus Jn Pierre, Christopher Mayville.
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Manoj Chopra
Associate Dean For Academic Affairs And Professor Of Engineering, Ncaa Faculty Athletics Representative For UcfOrlando, Fl3mail.ucf.edu, ucf.edu, mail.ucf.edu4 +140764XXXXX
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Manoj Chopra
Coppell, Tx2yahoo.com, essilor.com -
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Manoj Chopra
San Francisco Bay Area4citiustech.com, syntelinc.com, comcast.net, syntelinc.com1 (248) 6XXXXXXX
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