Mark M. Email & Phone Number

Toronto, Ontario, Canada

Toronto, Canada Area

Toronto, Canada Area

Toronto, Canada Area

Developed integration between tour booking software systems of G Adventures, Inc and National Geographic, Inc. Implemented middleware in Python/Django, that translates G Adventures API calls to Peak15systems API calls

Toronto, Canada Area

Implemented web crawlers in Python for search engine of Filmefy.com .Developed acceptance testing suite for corporate website (unotelly.com) in PHP-Codeception / Selenium.Developed promotion coupon generation service in PHP/Laravel, integrated with third-party billing system (WHMCS).Developed back-end in PHP/Laravel for checkout page of the corporate website.

Toronto, Canada Area

Developed and implemented System Testing Framework for Morega Systems product line. Designed and implemented all major framework components, including verification methods,secure and insecure HTTP mock-servers, device detection (uPnP) UDP-multicast and UDP mock-servers, and file system mock in Python, created test benches Wrote test automation suites, ran tests, which revealed problems on a system level, thereby led to software quality improvement and cost reduction.

Toronto, Canada Area

Designed High-Voltage tolerant IO for DisplayPort AUX channel and I2C on 28nm CMOS technology basis: transmitter and receiver schematic design/verification, pre- and post-layout simulations, mixed signal verification: logic equivalence check, overvoltage check, etc. Successfully conducted bring-up of the chip to production.Designed On-Die Device Monitor for the analysis of I-V characteristics of MOSFETs and resistors which allowed to verify the factory supplied spice models and, thus, enhanced the debugging process.

Toronto, Canada Area

Developed and implemented Serializer for PCIExpress Gen 2 testchip: RTL modification, synthesis, place & route, timing analysis.Participated in implementation of analog IO of DDR2 and DDR3 for 2 families of northbridge chipsets: schematic design/verification, pre- and post-layout simulations. Successfully conducted bring-up of the chip to production.Design of High-Voltage tolerant IO for DisplayPort AUX channel and I2C on 32nm and 28nm technology basis.

Waterloo, Ontario, Canada

Developed first sub-100'C PECVD amorphous silicon oxide suitable for top-gate TFT application on plastic substrates. Conducted R&D in the area of flexible electronics and TFT fabrication on plastic substrates for display technologies.Improved adhesion between layers in p-i-n structures by hydrogen treatment of the surface during PECVD.Performed statistical analysis of experimental data (regression analysis), built empirical models of the process variation parameters on the electrical properties of TFTs and p-i-n structures, thereby finding optimal fabrication parameters.Developed roadmap for deposition of uniform dielectric layers on large area substrates by PECVD.Created top-gate TFT matrix prototype at sub-100’C PECVD.

Moscow, Russian Federation

Associate Professor at Physical Chemistry and Materials Science Department.Delivered courses of Physics and Technology of Amorphous Semiconductors, Semiconductor Devices for Energy Conversion, Experiment Planning.

Moscow, Russian Federation

Edited numerous amount of articles dedicated to different areas of electronics.Wrote reviews on the state-of-the-art technologies and new achievements in modern electronics.

Delft Area, Netherlands

Carried out research on the stability improvement of amorphous silicon solar cells: the project funded by Netherlands Organization for Scientific Research (NWO) grant for the research in photovoltaics.Implemented the experimental setup for solar cell degradation monitoring. Wrote software (C, UNIX platform) for real time data capture via IEEE-488 General Purpose Interface Bus. Carried out research on the stability improvement of amorphous silicon solar cells.