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Mel Bowman is listed as Principal Engineer, Platform Design based in San Jose, California, United States. AeroLeads shows a work email signal at comcast.net and a matched LinkedIn profile for Mel Bowman.
Mel Bowman previously worked as Principal Engineer at Adlink Technology, Inc. and Principal Engineer at Kontron America. Mel Bowman holds Bsee (Magna Cum Laude) from Western Michigan University.
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AeroLeads found 1 current-domain work email signal for Mel Bowman. Compare company email patterns before reaching out.
HIGH-SPEED DESIGN ENGINEER - RETIRED• Extensive experience in PC motherboard design, microprocessor based embedded systems digital and analog hardware design and development (Board-Level) • Creative and self-motivated, highly effective problem solver with excellent organizational and project management skills• Effective communicator, results oriented with a meticulous attention to detail• Experienced with High-Speed PCB signal integrity, design and layout requirements, techniques and toolsSpecialties: High-Speed board design engineering and PCB layout
Listed skills include Engineering, Microsoft Excel, Product Development, Debugging, and 25 others.
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San Jose, Ca
Design and development of Intel chipset based computers for embedded systems (COM Express carrier boards).§ Develop Engineering Design Specifications§ Implement designs using Cadence OrCAD and Allegro and PCB layout tools§ Specify components§ Develop PCB stack-up and layout guidelines
Fremont, Ca
Kontron America, Fremont, CA 2007 - PresentPrincipal EngineerDesign and development of Intel and AMD chip-set based computers for embedded systems. Responsible for hardware specification, design, layout, prototype bring-up, test and transfer to productionDesign projects: · Three-board, hospital bed-side monitor system, implementing PCIe, SATA, USB 2, Compact Flash, VGA, SDV0-DVI, LVDS and HDA interfaces· Embedded computer for gaming console (slot machine)· Multiple Intel and AMD, x86 based standard products designed to industry standard, COM Express (PIC MG) specifications, implementing Display Port, HDMI, DVI, Gigabit Ethernet, PCIe 2.0, USB 3.0, SATA 3.0, SD Card, eMMC, MIPI CSI, DDR3 and DDR3L· 150W, dual output, switching power supply with input surge protection and super capacitor hold-up circuitry, designed to meet stringent automotive transient requirements for 12V and 24V systems (used in multiple systems)· Elevator kiosk RFID/NFC card reader module· Aircraft entertainment flight server dual wireless modem card Responsibilities:· Engineering Design Specification development· Design implementation using Cadence OrCAD (Allegro Design Entry) and Mentor DxDesigner schematic capture tools, Cadence Allegro and Mentor Expedition PCB layout tools· In-house, local and offshore outsourced design engineering resource technical supervision· CPLD specification, development, debug and test· Power architecture specification and implementation (linear and switching regulators)· Hardware BIOS requirements specification· Specialized function, new circuit design and development· Component specification· High-speed PCB stack-up and layout rule development and specification· PCB fabrication vendor, management and engineering interface· Local and off-shore PCB engineering resource technical supervision· Support Applications Engineering for design related issues· PCB and system prototype bring-up execution· Design Validation Test (DVT) specification
Santa Clara, Ca
Design and development of validation boards and reference platforms.Design projects: Series of Transmeta Efficeon x86 based microprocessor validation boards (super-set of PC motherboard) and PC reference platforms that utilized I2C, SMB, LPC, AMD Hypertransport, AGP 3.0, PCI, PCI Express (PCIe), SATA, USB 2.0, DDR1 and DDR2 high-speed industry standard interfacesResponsibilities:· Design implementation using Cadence OrCAD (Allegro Design Entry) schematic capture tools and Cadence Allegro PCB layout tools· Component placement, critical signal routing, length matching and power distribution routing, using Cadence Allegro PCB editor· Development of system power sequence control algorithms and glue logic, including Intel x86 mobile PC power state sequencing, and write Verilog code to implement control logic in CPLD· Signal integrity evaluation of high-speed interface buses, such as AGP and Hypertransport, using eye patterns· Design of multi-board validation system with high-speed, Hypertransport interface operating over board-to-board interconnect at 400 MHz· Provide hardware support for new silicon and software bring-up· Review customer schematics and PCB layouts· Customer schematic and PCB layout review· Product documentation release to Agile document control database, including ECOs and re-work documentation
• High-Frequency Digital Design, Instructor – Robert J. Hanson • Key Issues of EMI/EMC, Instructor – Robert J. Hanson • Advanced.
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Mel Bowman is listed as Principal Engineer, Platform Design.
AeroLeads has found 1 work email signal at @comcast.net for Mel Bowman.
Mel Bowman is based in San Jose, California, United States.
Mel Bowman has worked for Adlink Technology, Inc., Kontron America, and Transmeta Corp., Santa Clara, Ca.
You can use AeroLeads to view verified contact signals for Mel Bowman, including work email, phone, and LinkedIn data when available.
Mel Bowman holds Bsee (Magna Cum Laude) from Western Michigan University.
Mel Bowman is listed with skills including Engineering, Microsoft Excel, Product Development, Debugging, Electronics, Hardware Architecture, Embedded Systems, and Asic.
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