Mike Krawchuk

Mike Krawchuk Email and Phone Number

Mask Designer Seeking New Opportunities @ SRI International
menlo park, california, united states
Mike Krawchuk's Location
Bethlehem, Pennsylvania, United States, United States
Mike Krawchuk's Contact Details

Mike Krawchuk personal email

n/a
About Mike Krawchuk

Results driven layout engineer who provided newly floor planned robust layout solutions within a dynamic team environment for leading communications and storage products vending companies.Modified various Analog and Mixed signal low power, deep sub micron technology circuit parts which were integrated in an Analog Front End Read Channel used in a state of the art system on a chip (SOC) design. These modified parts were also reduced up to 20% in some cases.Constructed proprietary information test integrated circuit chips utilizing the latest low power, deep sub micron technologies for ADC, Band gaps, Phase Lock Loops, Voltage Regulators Input/Output buffers utilizing ESD protection devices to ensure functional performance integrity and reliability.Layout Technologies: 10nmFF, 14nmFF, 16FFnm, 20nm and 28nm designsLayout/Testing/Verification Skill Set: Cadence Virtuoso-XL,Cadence Spectre, Apache TotemCircuit Verification : Assura/LVS, Mentor Calibre/DRC/LVS, Synopsis Hercules/DRC/LVSSpecialties: ISO 9000 certificationMS Office Tools: Excel, Outlook, Powerpoint and Word

Mike Krawchuk's Current Company Details
SRI International

Sri International

View
Mask Designer Seeking New Opportunities
menlo park, california, united states
Website:
sri.com
Employees:
2087
Mike Krawchuk Work Experience Details
  • Sri International
    Layout Design Engineer
    Sri International Apr 2017 - Present
    Greater New York City Area
    View
  • Multi-Phy
    Mask Layout Designer
    Multi-Phy Dec 2015 - Jul 2016
    Allentown, Pennsylvania Area
    High Speed Design Layout of ADC.
  • Qualcomm
    Mask Designer Contractor
    Qualcomm Feb 2015 - Sep 2015
    Raleigh-Durham, North Carolina Area
    Floorplanning and Layout of Analog/Mixed signal layouts utilizing the latest Fin Fet technologies.
    View
  • Lsi
    Senior Analog Physical Design Engineer
    Lsi Apr 2007 - Oct 2014
    Worked directly with Analog/Mixed Signal design engineers in providing world class physical designs of various components of the latest sub micron technologies included within an Analog Front End design that was placed in an SOC.Some of these layouts were included within ADC's,and CTF's, Stand alone devices included Band gaps, DAC's, Master Bias, Read/Write I/O, Voltage Regulators, and various other I/O test devices.Involved in the Physical Layout of ESD (Electrostatic Discharge) devices which protect circuits from up to 2000v of electricity, I/O devices, analog and digital circuitry.
    View
  • Agere Systems
    Physical Design Engineer
    Agere Systems Apr 2001 - Apr 2007
    Allentown, Pennsylvania Area
    Continued working on various Analog/Mixed signal parts which included mainly PLL's, Band gaps and some I/O buffers for testing and commercial use on the latest technologies.Became an integral part of the quality control due to the introduction of ISO9000. Various responsibilities included the development of an Analog/Mixed signal library system responsible for obtaining, distributing and tracking all parts used in IC chips worldwide.
    View
  • Lucent Technologies
    Physical Design Engineer
    Lucent Technologies Apr 1996 - Apr 2001
    Developed phase lock loops, crystal ocillators and I/O buffersBuilt test chips and sent them to be manufactured.
    View
  • At&T
    Layout Designer
    At&T Sep 1992 - Apr 1996
    Started generating Test Vectors for Field Programmable Gate Arrays (FPGA) for the AT&T ORCA product family, Moved on to physical design of FPGA I/O circuitry and then moved into a Analog/Mixed Signal layout group producing test IC chips containing mainly Phase Lock Loops (PLL's) for use in ASIC chips.
    View

Mike Krawchuk Skills

Bias Circuitry Cmos Asic Ic Soc Semiconductors Mixed Signal Analog Physical Design Floorplanning Drc Application Specific Integrated Circuits System On A Chip Integrated Circuits Analog Circuit Design Microsoft Office Verilog Microsoft Excel Testing Low Power Design

Mike Krawchuk Education Details

Frequently Asked Questions about Mike Krawchuk

What company does Mike Krawchuk work for?

Mike Krawchuk works for Sri International

What is Mike Krawchuk's role at the current company?

Mike Krawchuk's current role is Mask Designer Seeking New Opportunities.

What is Mike Krawchuk's email address?

Mike Krawchuk's email address is mi****@****lsi.com

What schools did Mike Krawchuk attend?

Mike Krawchuk attended Desales University, New Jersey Institute Of Technology, Brookdale Community College.

What skills is Mike Krawchuk known for?

Mike Krawchuk has skills like Bias Circuitry, Cmos, Asic, Ic, Soc, Semiconductors, Mixed Signal, Analog, Physical Design, Floorplanning, Drc, Application Specific Integrated Circuits.

Who are Mike Krawchuk's colleagues?

Mike Krawchuk's colleagues are Smith Brown, Allie Flanders, Valerie Orner, James Jhirad, Ramanathan Padmanaban, Athula Wera, Joe Carlson.

Not the Mike Krawchuk you were looking for?

View similar profiles

Free Chrome Extension

Find emails, phones & company data instantly

Find verified emails from LinkedIn profiles
Get direct phone numbers & mobile contacts
Access company data & employee information
Works directly on LinkedIn - no copy/paste needed
Get Chrome Extension - Free

Aero Online

Your AI prospecting assistant

Download 750 million emails and 100 million phone numbers

Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.