Mousa Karimi Email & Phone Number

Montreal, Quebec, Canada

- Design verification in the GF45nm-RFE, GF55nm-BCDLite, TSMC180nm, TSMC180nm-BCD, XFAB-180nm, and partially design verification in GF22nm-FDSOI technologies at CMC Microsystems.- Offers manufacturability and process technology guidance to researchers and collaborates with foundries.- Provide general user support for both layout and schematic designers to academic and industrial clients.- Contribute to prepare PDKs (process design kits) for CMOS technologies.

Montreal, Quebec, Canada

Research Area: Neuromorphic circuits and architecture.- Designed and simulated a Near Real-Time Spike-Driven Synaptic Plasticity for CTT-Based Neuromorphic Systems.- Designed and simulated a Leakage Digital LIF Neuron for CTT-Based Neuromorphic Systems.

Research Area: Neuromorphic circuits and architecture.- Designed and simulated a CTT-Based Scalable Neuromorphic Architecture.- Designed and simulated a Statistical Weight Refresh System for CTT-Based Synaptic Arrays.- Designed and simulated a Digital LIF Neuron for CTT-Based Neuromorphic Systems.

Research Area: Neuromorphic circuits and architecture.

I instructed a course on Analog and Mixed Signal VLSI Design through remote teaching.

Quebec City

Research Area: Efficient Power Converter Design- Designed, fabricated, and tested an Energy-Efficient Buck Converter Leveraging High-and Low-Sides Asymmetric Deadtimes.- Designed, fabricated, and tested a 7.6-ns Delay Subthreshold Level-Shifter Leveraging a Composite Transistor and a Voltage-Controlled Current Source.- Designed, fabricated, and tested a 9.2-ns to 1-us Digitally Controlled Multituned Deadtime Optimization for Efficient GaN HEMT Power Converters.- Designed, fabricated, and tested an Active Dead-Time Control Circuit With Timing Elements for a 45-V Input 1-MHz Half-Bridge Converter.- Designed and simulated a Reconfigurable Single-Supply Multiple-Level Down-Shifter for System-on-Chip Applications.- Designed and simulated a Reconfigurable Single-Supply Multiple-Level Down-Shifter for System-on-Chip Applications.- Designed and simulated a Wide-range Reconfigurable Deadtime and Delay Element for Optimal-Power Conversion.- Designed and simulated a Versatile Non-Overlapping Signal Generator for Efficient Power-Converters Operation.- Designed and simulated a 2-ns 0.5-pJ Wide Frequency Range Level Shifter With Closed-Loop Negative Feedback.- Designed, implemented, and tested a system to Proof the Concept for Implantable Oximetry. Results of a Feasibility Study.- Contributed in developing an Ultralow-Power Capacitive Array-Based IR-UWB Transmitter Using Cross-Coupled Oscillator.

Technical ExpertResponsibilities: Designing circuits and implementing PCBs for automotive applications.

- Designed, implemented, and tested a noncoherent low-power high-data-rate BPSK demodulator and clock recovery circuit for implantable biomedical devices.- Designed and simulated a low-power, generic biostimulator with arbitrary pulse shape, based on a central control core.- Designed, implemented, and tested an Auxiliary-carrier load-shift keying for reverse data telemetry from biomedical implants.

Ph.D., Electrical And Electronics Engineering

Ph.D. Dissertation: Reconfigurable Gate Driver Toward High-Power Efficiency and High-Power Density Converters. Supervisor: Professor.

Master Of Science - Ms, Electrical And Electronics Engineering

M.Sc. Thesis: Wireless Power Transmission to and Bidirectional Data Communication with Implantable Biomedical Microsystems Supervisor.

B.Sc., Electrical And Electronics Engineering

Final Project: RFID Reader Implementation at 125 KHz Advisor: Dr. Mostafa Esmailbeig