Marco Siracusa

Marco Siracusa Email and Phone Number

HW/SW architect for large-scale HPC/ML systems - Stanford University | Samsung Semiconductor | Barcelona Supercomputing Center @ Samsung Semiconductor
Marco Siracusa's Location
San Francisco Bay Area, United States
About Marco Siracusa

Hardware-software architect for large-scale HPC/ML systems. Engaged in 13+ research projects at leading universities and companies. Authored 10+ papers and 2 patents. Currently dedicated to optimizing supercomputers and compilers for dense and sparse scientific and machine learning models.

Marco Siracusa's Current Company Details
Samsung Semiconductor

Samsung Semiconductor

View
HW/SW architect for large-scale HPC/ML systems - Stanford University | Samsung Semiconductor | Barcelona Supercomputing Center
Marco Siracusa Work Experience Details
  • Samsung Semiconductor
    Large-Scale Hw/Sw System Architect Intern - Hpc/Ml
    Samsung Semiconductor Jun 2024 - Present
    San Jose, California, United States
    Optimizing supercomputers (hardware, compilers, and software) for HPC and ML workloads.
    View
  • Stanford University
    Visiting Phd Student - Hpc/Ml Compilers
    Stanford University Jun 2024 - Present
    Stanford, California, United States
    Designing compilers for sparse scientific and machine learning workloads.
    View
  • Barcelona Supercomputing Center
    First Stage Researcher - Sparse/Dense Tensor Computation For Hpc And Ml
    Barcelona Supercomputing Center Jul 2021 - Present
    Barcelona, Catalonia, Spain
    Closely collaborating with our industrial partners to optimize next-generation supercomputers for HPC and ML workloads.
    View
  • Arm
    Computer Architect Intern - Deep Learning Recommendation Models
    Arm Mar 2024 - May 2024
    Nice Metropolitan Area, Provence-Alpes-Côte D'Azur, France
    Leveraged Arm vector/matrix extensions to accelerate computation in Deep-Learning Recommender Models.
    View
  • Stanford University
    Visiting Phd Student - Ml Compilers
    Stanford University Sep 2023 - Dec 2023
    Stanford, California, United States
    Designed a compiler to lower embedding operations in TensorFlow and PyTorch to specializedhardware such as decoupled access-execute architectures.
    View
  • Arm
    Computer Architect Intern - Deep Learning Recommendation Models
    Arm May 2023 - Aug 2023
    Nice Metropolitan Area, Provence-Alpes-Côte D'Azur, France
    Investigated architectural optimizations for Deep-Learning Recommender Models.
    View
  • Necstlab
    Research Scholar - Hpc Architectures And Compilers
    Necstlab May 2017 - Jun 2021
    Milan Area, Italy
    - Developed an LLVM-based compiler toolchain to analyze and optimize HPC applications for FPGAs.- Accelerated several HPC applications with FPGAs and GPUs.
    View
  • Huawei
    Computer Architect Intern - Irregular Computation
    Huawei Sep 2020 - Feb 2021
    Zurich, Switzerland
    Performance analysis and optimization of irregular workloads on server-grade processors.
    View
  • Huxelerate
    Compiler Engineer Intern - Compilers For Hpc Architectures
    Huxelerate Feb 2020 - Aug 2020
    Milan, Lombardy, Italy
    Developed a compiler technique to assess the performance portability of HPC applications to various hardware accelerators.
    View
  • Berkeley Lab
    Student Research Assistant - Hpc Archtiectures
    Berkeley Lab Oct 2019 - Jan 2020
    Berkeley, Ca, United States
    Joined a team in the NERSC/CRD department to evaluate the performance potential of different HPC accelerators in next-generation supercomputers.
    View
  • Sick Sensor Intelligence
    Machine Learning Engineer Intern - Automatic Dnn Training
    Sick Sensor Intelligence Apr 2016 - Aug 2016
    Hamburg Area, Germany
    Implemented a process to automatically train deep neural networks for industrial applications.
    View

Marco Siracusa Education Details

Frequently Asked Questions about Marco Siracusa

What company does Marco Siracusa work for?

Marco Siracusa works for Samsung Semiconductor

What is Marco Siracusa's role at the current company?

Marco Siracusa's current role is HW/SW architect for large-scale HPC/ML systems - Stanford University | Samsung Semiconductor | Barcelona Supercomputing Center.

What schools did Marco Siracusa attend?

Marco Siracusa attended Stanford University, Universitat Politècnica De Catalunya, Politecnico Di Milano, Università Degli Studi Di Parma.

Not the Marco Siracusa you were looking for?

  • Marco Siracusa

    Marco Siracusa
    - Organization & Business Networking Director I.D.E.A.L.E. Scarl- President Presso Dinamica Result Based Consulting Srl
    Milan
    1
    dinamicarbc.com
  • Marco Siracusa

    Marco Siracusa
    Ms In Finance Student (Stem) @ Zicklin School Of Business | Baruch College
    New York, Ny
    2
    tecnocasa.it, valuepartners-group.com
  • Marco Siracusa

    Marco Siracusa
    Agile And Devops Advocate | Technical Manager Presso Alstom
    Genoa
    4
    gmail.com, teoresigroup.com, gmail.com, alstom.com
  • Marco Siracusa

    Marco Siracusa
    Managing Director
    Greater Melbourne Area
View similar profiles

Free Chrome Extension

Find emails, phones & company data instantly

Find verified emails from LinkedIn profiles
Get direct phone numbers & mobile contacts
Access company data & employee information
Works directly on LinkedIn - no copy/paste needed
Get Chrome Extension - Free

Aero Online

Your AI prospecting assistant

Download 750 million emails and 100 million phone numbers

Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.