Nick Whidden Email & Phone Number

Santa Clara, Ca, Us

Santa Clara, Ca, Us

Designing high performance computing systems for deep learning, machine learning, large scale deep neural networks.

San Jose, California, Us

Responsible for all aspects in the hardware realm functioning as part of a small collaborative team of talented engineers and software developers to create high performance computing systems for cryptocurrency transaction processing.• Established in-house hardware design capabilities from the ground floor, starting with appropriate tool procurement for schematic capture, layout and component library management before taking over full ownership of the first generation design from ODM partner.• System validation test procedure authoring and execution of prototype bring-up/debugging, including first silicon 28nm ASICs.• Provided training and support to Test Engineering team at CM during NPI production phase to troubleshoot manufacturing issues and defects.• R&D innovative topologies and techniques to optimize system cost/performance (patent-pending).

Palo Alto, California, Us

• Responsible for technical support of high performance KBP processors, including datasheet and design guideline authoring, customer design review, hands-on bring-up support, debug assistance and failure analysis.• Quickly filled the roles of System Designer and Hardware Expert for the Product Applications team. Served as de-facto Hardware Advisor for ASIC design and production test teams. Designed and deployed engineering test boards and customer reference designs for next generation products. • Developed and published design guidelines for device-specific power and signal integrity considerations. Power delivery topology and PDN requirements, SerDes channel design requirements and recommendations, and detailed design examples included.• Created a Plug-and-Play SerDes equalizer optimization test-bench utilizing Agilent ADS’ multivariable optimization engine for internal and customer use. The test-bench automatically adjusts equalizer variables to achieve maximum eye width and height for a given channel.

• Designed a Rear Transition Module to bring out PCIe, Gig-E, RS-232, JTAG, and SDI video interfaces from a VITA-46 Single Board Computer for prototype verification and production test/debug.• Simulated PCIe and SDI video systems in HyperLynx to ensure acceptable Signal Integrity and Bit Error Rate for each bus pre- and post- layout.• Designed, fabricated and tested a multi-layer circuit board to interface two development boards for R&D.

Waterloo, On, Ca

Waterloo, On, Ca

Bachelor Of Applied Science (B.A.Sc.), Electrical And Electronics Engineering

Power Electronics