Jonathan Park Email & Phone Number

San Jose, Ca, Us

Santa Clara, California

San Francisco Bay Area

BaySand is a fast-growing semiconductor company focused on ASIC, ASSP and SoC solution with its innovative and disruptive Metal Configurable Standard Cell (MCSC) technology. It’s technology and products deliver compatible PPA to standard-cell technology while providing unparalleled value propositions in reduced NRE, time to market (TTM) and design flexibility. It's MetalCopy product provides seamless volume production solution from Altera & Xilinx FPGA with package compatibility.Co-founded the company and has headed technology and product development from concept to high volume production for many advanced process nodes. ✓ Project management from definition to volume production within cost/schedule/resource constraints✓ Built organization for design and support of products including HW, CAD, PE, TE, AE and Packaging etc✓ Metal programmable IP development (PLL, DDR/LVDS PHY, I/O, memories, etc) and licensing to IDMs✓ Extensive experience with external suppliers including FAB, EDA, IPs and supply chain vendors✓ Business development and technical sale on major key customers✓ Has procured 13+ patents related to MCSC technology and methodology

eASIC is a semiconductor start-up funded by Kleiner-Perkins and known for its via-only programmable ASIC technology.Responsible for the development and release of 2 generation of via-only programmable ASIC technology and product for high-end FPGA replacement and volume production.✓ Executive reporting to CEO responsible for HW and technology development✓ Project management from definition to volume production within cost/schedule/resource constraints✓ Built highly effective engineering team and methodology from scratch and multiple sites✓ Innovative modeling and robust ASIC implementation methodology (3 patents)

Headed new ASIC product (HardCopy) development from concept to volume production.✓ Built new engineering team from scratch in US and Malaysia for development (new business unit)✓ Defined and developed new design methodology and automation for seamless migration from FPGA✓ Delivered 2 generation of HC products and reached annual revenue of $100M+✓ Project management and cross-functional team coordination including HW, SW, PE, TEST, Packaging and Marketing etc.✓ IP migration and qualification through rigorous verification automation and checklist✓ Inventor of novel architecture and method for differentiation and value proposition (6 patents)

Created and developed Application Engineering team for execution of ASIC implementation from RTL/Netlist to System bring-up and production.✓ Developed full automation from RTL/Netlist submission to T/O including synthesis, P&R and Test✓ Business development and technical support on major customers and design wins

Responsible for ASIC implementation from RTL to volume production for major customers including project management and internal cross-functional team coordination.

Gate Array technology and product development including I/O, memory, std.cell etc.Expertise in physical design and lead gate array architecture innovation with 3 patents.