Pascal Blanc

Pascal Blanc Email and Phone Number

Principal Application Engineer at Cadence Design Systems @ Cadence Design Systems
sweden
Pascal Blanc's Location
Grenoble, Auvergne-Rhône-Alpes, France, France
Pascal Blanc's Contact Details

Pascal Blanc work email

Pascal Blanc personal email

About Pascal Blanc

Pascal Blanc is a Principal Application Engineer at Cadence Design Systems at Cadence Design Systems. He possess expertise in dft, low power design, logic synthesis, atpg, upf and 15 more skills.

Pascal Blanc's Current Company Details
Cadence Design Systems

Cadence Design Systems

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Principal Application Engineer at Cadence Design Systems
sweden
Website:
cadence.se
Employees:
10
Pascal Blanc Work Experience Details
  • Cadence Design Systems
    Principal Application Engineer
    Cadence Design Systems Sep 2022 - Present
  • Stmicroelectronics
    Digital Hw Senior Staff Engineer
    Stmicroelectronics Jun 2015 - Sep 2022
    Grenoble, Auvergne-Rhône-Alpes, France
    SoC digital synthesis and low-power (STM32 MCUs) - Physical RTL synthesis - Formal equivalence checking - SDC constraints development and STA/signoff - Power analysis & optimisation - Implement advanced low-power techniques (power gating, voltage islands, retention, …) - UPF development and power intent verification
  • Stmicroelectronics
    Digital Hardware Design Engineer
    Stmicroelectronics Apr 2013 - May 2015
    Grenoble, Rhône-Alpes, France
    Digital designer mainly focused on low-power design challenges : - Power intent description (UPF) - Power-aware verification with low-power static checkers and digital simulators - Static and dynamic power analysis
  • St-Ericsson
    Digital Hardware Design Engineer
    St-Ericsson Jan 2012 - Mar 2013
    Grenoble Area, France
    RTL SynthesisUPF development and Low-Power Verification
  • St-Ericsson
    Dft Engineer
    St-Ericsson Feb 2009 - Dec 2011
    Expert in DFT tools and methodologies on complex SoC design
  • Stmicroelectronics
    Dft Engineer
    Stmicroelectronics Aug 2007 - Feb 2009
    Expert in DFT tools and methodologies on complex SoC design
  • Defacto Technologies
    Trainee
    Defacto Technologies Jan 2007 - Jun 2007
    Power consumption estimation and testability improvement of integrated circuits at RTL level

Pascal Blanc Skills

Dft Low Power Design Logic Synthesis Atpg Upf Digital Ic Design Scan Insertion Soc Integrated Circuit Design Asic Rtl Tcl Low Power Systems Synopsys Tools Vlsi Powerpoint Rtl Design Digital Electronics Jtag Vhdl

Pascal Blanc Education Details

Frequently Asked Questions about Pascal Blanc

What company does Pascal Blanc work for?

Pascal Blanc works for Cadence Design Systems

What is Pascal Blanc's role at the current company?

Pascal Blanc's current role is Principal Application Engineer at Cadence Design Systems.

What is Pascal Blanc's email address?

Pascal Blanc's email address is pa****@****ail.com

What schools did Pascal Blanc attend?

Pascal Blanc attended Institut National Polytechnique De Grenoble.

What skills is Pascal Blanc known for?

Pascal Blanc has skills like Dft, Low Power Design, Logic Synthesis, Atpg, Upf, Digital Ic Design, Scan Insertion, Soc, Integrated Circuit Design, Asic, Rtl, Tcl.

Who are Pascal Blanc's colleagues?

Pascal Blanc's colleagues are Suresh Kumar, Digvijay Patil, Wenjuan Ge, Jayabrata Chowdhury, Damien Royer, Aman Singh, Johannes Grad.

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