Senior Member Of Technical Staff Packaging Engineer
CurrentAdvanced Technology- Devote to 3DIC (3D V-Cache) new product introduction, pre-ramp up and mass production.- Drive 3DIC (3D V-Cache) technology yields improvement and new factory readiness.
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Patrick Cheng is listed as Senior Member Of Technical Staff Packaging Engineer at AMD, a company with 16705 employees, based in Taiwan, Taiwan, Taiwan, Province Of China. AeroLeads shows a matched LinkedIn profile for Patrick Cheng.
Patrick Cheng previously worked as Member Of Technical Staff Packaging Engineer at Amd and Sr. Packaging Engineer at Amd. Patrick Cheng holds Master Of Science - Ms, Materials Science And Engineering from Texas A&M University.
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Deliver multiple products with advanced package platforms from path finding development to high volume production including 3DIC (3D V-Cache); 2.5D (CoWoS-S/R/L, EFB (Elevated Fan Out Bridge), Wafer Level Fan-Out (InFO-oS/PoP) and CPI (Chip Package Interaction). 10+ years experienced in project management: design rule extension; technical risk assessment; process flow build-up; trouble shooting; BOM selection; failure analysis, package qualification & mass production. Global Tier 1 subcons management: close collaboration and deep relationships with Fab, OSATs, tool vendors & materials suppliers crossing US, Taiwan, China and Korea. Highly motivated and enthusiasm team player for solving technical issues with fluent bilingualism communication.
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Taiwan
Advanced Technology- Devote to 3DIC (3D V-Cache) new product introduction, pre-ramp up and mass production.- Drive 3DIC (3D V-Cache) technology yields improvement and new factory readiness.
Taiwan
Advanced Technology- Develop, qualify and deliver industry's first 3DIC (3D V-Cache) product to the market.- Dedicate to 3DIC (3D V-Cache) process integration, qualification and production.
Taiwan
Advanced Technology- Develop, qualify and deliver industry's first EFB (Elevated Fan Out Bridge) product to the market.- Commit packaging process integration & execution for multiple cutting-edge packaging projects including 3DIC, EFB, Wafer Level Fan-Out and advanced wafer node CPI validation.
Taiwan
New Technology Management (NTM) – Packaging Engineer- Integrated Fan-Out Wafer Level Package (InFO) development. Focus on chip last process flow with heterogeneous integration for application processor of HPC.- Modules-integration: hands-on experience and tooling expertise:- Flip-Chip bonding: fine pitch (<40um) die attach (Shibaura TFC-6000); flux.
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Vikram Singh
Colleague at AmdJabalpur, Madhya Pradesh, India, India
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Mehdi Khorrami
Colleague at AmdBushehr Province, Iran, Iran, Islamic Republic Of
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Vijay Bhaskar
Colleague at AmdHyderabad, Telangana, India, India
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Sri Harsha Puttagunta
Colleague at AmdFolsom, California, United States, United States
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Srikanth Gowda
Colleague at AmdUnited States, United States
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Sridhar Tupuri
Colleague at AmdHyderabad, Telangana, India, India
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Afeez Adegboyega
Colleague at AmdEdo State, Nigeria, Nigeria
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Danielle Aiello
Colleague at AmdAustin, Texas, United States, United States
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Ryan Ribar
Colleague at AmdUnited States, United States
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Kimvan Tran
Colleague at AmdSan Jose, California, United States, United States
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Quick answers generated from the profile data available on this page.
Patrick Cheng works for AMD.
Patrick Cheng is listed as Senior Member Of Technical Staff Packaging Engineer at AMD.
Patrick Cheng is based in Taiwan, Taiwan, Taiwan, Province Of China while working with AMD.
Patrick Cheng has worked for Amd and Tsmc.
Patrick Cheng's colleagues at AMD include Vikram Singh, Mehdi Khorrami, Vijay Bhaskar, Sri Harsha Puttagunta, and Srikanth Gowda.
You can use AeroLeads to view verified contact signals for Patrick Cheng at AMD, including work email, phone, and LinkedIn data when available.
Patrick Cheng holds Master Of Science - Ms, Materials Science And Engineering from Texas A&M University.
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