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• CURRENT: SAMSUNG, yield enhancement Sr. Director overseeing Samsung Foundry Austin process integration engineering, device engineering, product engineering, defect engineering and yield analysis. Additionally, work with foundry customers on new product introduction, yield and performance. Interested in machine learning, advanced node technologies and established node technologies.• PREVIOUS:SAMSUNG, Process integration director for all 14nm foundry productsSAMSUNG, Process Integration principle engineer to improve FEOL defects and device performance to achieve improved yield for 14nm and 20nm products at SAMSUNG Austin Semiconductor.SEMATECH, development of materials, tools, unit processes and integration schemes for High-K Metal Gate, Contacts, FinFET, SiGe, III-V and ESH Director of SEMATECH front end technology team developing unit process, equipment, fundamentals of material, metrology, characterization and modeling research for global customers.IBM Systems and Technology, Unit process, module integration, tool matching, metrology development for technology transfer to manufacturing for 130nm and 90nm products.Work with customers across the globe including foundries, fabless designers, equipment, and materials companies. CAREER COMPETENCIES• High-k /Metal gates• Process integration• FinFET• Conformal doping• Si, Ge and III-V epi• Ge on Si heterointegration• III-V on Si heterointegration • ESH of Ge and III-V• Optical and X-ray metrology• Manufacturing metrology• Equipment install & start up• Equipment matching• Cp-Cpk process capability ratios• Executive presentations • Business relationship management • Written & oral communication • Partnerships & negotiation • Strategic & budget planning
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Senior Director, Yield Enhancement EngineeringSamsung Semiconductor Apr 2023 - PresentAustinResponsible for Samsung Foundry Yield Enhancement engineering group in Austin. This group includes process integration engineering, device engineering, product engineering, yield analysis and defect engineering and control. -
Director, Process Integration EngineeringSamsung Foundry Mar 2020 - Jul 2023Austin, Texas Metropolitan Area -
Senior Manager, Process Integration EngineeringSamsung Foundry Mar 2017 - Mar 2020Austin, Texas Metropolitan Area -
Principal EngineerSamsung Foundry Mar 2014 - Mar 2017Austin, Texas Area- Responsible for 14nm semiconductor product defect reduction- Responsible for 14nm semiconductor device and circuit parameters- Responsible for leading 14nm module teams for yield improvement- Fab process monitoring, control and implementation of accurate metrology -
Director, Front End Process DivisionSematech Jul 2007 - Mar 2014Albany, NyMANAGEMENT* Direct the front end technology development team with responsibility for device, process, metrology and equipment deliverables. Results serve foundry, fabless, material and equipment suppliers. * Manage internal R&D operations (revenues, expenses, contracts, safety) in 200mm and 300mm fabs.TECHNICAL INNOVATIONS* Process flows for bulk, SOI FinFET, including Rco, doping, metrology* Gate first & gate last HK-MG flows for <28nm node. * Gate dielectric scaling to sub 1.2nm Tinv in full gate last test structure. * FinFET conformal doping process targeting Xj <10nm and <1000ohm/sq for Si, Ge, III-V. * New approaches for Rco scaling to < 1e-8 ohm-cm2 using TLM and 6T-CBK structures. * Contact optimization for high mobility SiGe FinFETs suited for 10nm node.* Developed III-V epi, III-V doping, III-V FinFET, ESH and fab ops protocols for As. * Non-volatile memory materials with focus on HfOx/TiN RRAM PARTNERSHIPS* Manage supply chain collaborations* Interact with R&D groups from member companies* Partner with university, national lab and government researchers to build idea pipeline speakers. * Organized symposium on gate stack technology with >110 attendees, >30 speakers. * Reviewer for Electron Dev Letters, Applied Phys Letters, J. of Applied Physics, IEEE IEDM, IEEE VLSI. -
Advisory EngineerIbm Systems And Technology Group Sep 2001 - Jul 2007Hopewell Junction, Ny And Austin, TxDeveloped fab process technology for IBM foundry, IBM SOI and IBM server needs.Technologies resulted in 130nm, 90nm, 65nm products for IBM foundry customers.Worked across teams : mfg , supply chain, reliability, device, and customer interface.
Paul Kirsch Skills
Paul Kirsch Education Details
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Chemical Engineering -
Chemical Engineering
Frequently Asked Questions about Paul Kirsch
What company does Paul Kirsch work for?
Paul Kirsch works for Samsung Semiconductor
What is Paul Kirsch's role at the current company?
Paul Kirsch's current role is Senior Director at Samsung Foundry.
What is Paul Kirsch's email address?
Paul Kirsch's email address is p.****@****ung.com
What is Paul Kirsch's direct phone number?
Paul Kirsch's direct phone number is (518)-649*****
What schools did Paul Kirsch attend?
Paul Kirsch attended The University Of Texas At Austin, University Of Wisconsin-Madison.
What skills is Paul Kirsch known for?
Paul Kirsch has skills like Semiconductors, Semiconductor Industry, Process Integration, Characterization, Thin Films, Cmos, Design Of Experiments, Ic, Silicon, Metrology, Nanotechnology, Materials Science.
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