Paul Carpenter Email & Phone Number

Senior Researcher at Barcelona Supercomputing Center (BSC). Leading Microserver Architectures and System Software team, which focusses on (a) clusters / distributed memory support for the OmpSs programming model, (b) hypervisor support for programming models and coherence islands, and (c) interconnect energy proportionality for HPC workloads on Ethernet and InfiniBand.Principal Investigator (PI) for H2020 EuroEXA Project (205 PMs at BSC), FP7 Euroserver Project (137 PMs at BSC) and H2020 ExaNoDe Project (113 PMs at BSC). Applications and Systems Software Technical Manager (STM) of EuroEXA, with overall responsibility for two WPs. (Co-)Director for five PhD students, and managing one engineer. Co-chair of Working Group on Programming Models in ETP4HPC, the European Commission's (EC's) partner in the High-Performance Computing (HPC) Contractual Public-Private Partnership (CPPP), which monitors and manages the public European HPC investment programme to achieve EU growth, competitiveness and sustainability, and which represents the whole HPC industry and academia within Europe (now 70 members). Work Package leader for Eurolab-4-HPC WP2 Research, ExaNoDe WP3 Software Enablement and EuroEXA WP2 Applications. I received my PhD in computer architecture from Universitat Politècnica de Catalunya in 2011 related to stream programming models. Prior to starting my PhD, I was Senior Software Engineer at ARM in Cambridge, UK, as technical lead for audio and video codec development. I was founder of a small consulting company, through which I was member of the small team that designed ARM NEON / Advanced SIMD, which is implemented in 50% of all mobile phones worldwide. I have an BA in mathematics (1996) and MA in computer science (1997), both from the University of Cambridge.Always looking for interesting collaborations and opportunities, consulting, etc.

Listed skills include Computer Architecture, High Performance Computing, Parallel Programming, Parallel Computing, and 16 others.