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Peter King Email & Phone Number

Principal Engineer at CreVinn Teoranta at Cadence Design Systems
Location: Ireland, Ireland, Ireland 7 work roles 2 schools
2 work emails found @crevinn.com LinkedIn matched
✓ Verified Jun 2026 4 data sources Profile completeness 100%

Contact Signals · 2 work emails

Work email p****@crevinn.com
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Current company
Cadence Design Systems
Role
Principal Engineer at CreVinn Teoranta
Location
Ireland, Ireland, Ireland
Company size
10 employees

Who is Peter King? Overview

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Quick answer

Peter King is listed as Principal Engineer at CreVinn Teoranta at Cadence Design Systems, a company with 10 employees, based in Ireland, Ireland, Ireland. AeroLeads shows a work email signal at crevinn.com and a matched LinkedIn profile for Peter King.

Peter King previously worked as Design Architect at Cadence Design Systems and Principal Engineer at Crevinn Teoranta. Peter King holds Master'S Degree, Electronic Engineering from University Of Limerick.

Company email context

Email format at Cadence Design Systems

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{first}.{last}@crevinn.com
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AeroLeads found 2 current-domain work email signals for Peter King. Compare company email patterns before reaching out.

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Profile bio

About Peter King

Peter King is a Principal Engineer at CreVinn Teoranta at Cadence Design Systems. He possess expertise in verilog, asic, fpga, soc, tcl and 13 more skills. He is proficient in German.

Listed skills include Verilog, Asic, Fpga, Soc, and 14 others.

Current workplace

Peter King's current company

Company context helps verify the profile and gives searchers a useful next step.

Cadence Design Systems
Cadence Design Systems
Principal Engineer at CreVinn Teoranta
sweden
Website
cadence.se
Employees
10
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7 roles

Peter King work experience

A career timeline built from the work history available for this profile.

Asic Design Engineer

Crevinn Teoranta

Design and verification. Using VMM and OVM/UVM

Aug 2005 - Jun 2011

Digital Design Engineer

Pei-Csrc

Worked here as part of my research masters. Working on SCULPT (System on chip utilising lower cost process technologies). Main responsibility was development of LIN node for this project. This differs from previous LIN nodes as almost all of the functionality is moved to hardware using verilog.

Oct 2003 - Jul 2005

Computer Engineer

University Of Toronto, Ece Department

Worked in ECE department with masters students.Worked on individual project to implement uClinux, a microprocessor version of linux.

Jun 2003 - Sep 2003

Embedded Software Enginer

Xilinx

Worked on testing telecommunications unit with tcl/tk scripts.

Jun 2001 - Jan 2002
Team & coworkers

Colleagues at Cadence Design Systems

Other employees you can reach at cadence.se. View company contacts for 10 employees →

LG Lola Gotlin, Cpa, Mba Lola Gotlin, Cpa, Mba Colleague at Cadence Design SystemsSanta Clara, California, United States, United States View → CQ Chaoxian Qi Chaoxian Qi Colleague at Cadence Design SystemsHouston, Texas, United States, United States View → MG Meera Ganesh Meera Ganesh Colleague at Cadence Design SystemsNew Delhi, Delhi, India, India View → AA Asvin-Ray Amalanayagam Asvin-Ray Amalanayagam Colleague at Cadence Design SystemsViroflay, Île-de-France, France, France View → SA Subitsha Athinarayanan Subitsha Athinarayanan Colleague at Cadence Design SystemsBengaluru, Karnataka, India, India View → BW Bertram Winter Bertram Winter Colleague at Cadence Design SystemsVillach, Carinthia, Austria, Austria View → SG Shyam Ganesh Shyam Ganesh Colleague at Cadence Design SystemsBengaluru, Karnataka, India, India View → CA Chun An Lee Chun An Lee Colleague at Cadence Design SystemsHsinchu City, Taiwan, Taiwan, Taiwan, Province Of China View → AS Anooshkha Shetty Anooshkha Shetty Colleague at Cadence Design SystemsSan Francisco Bay Area, United States View → AB Amanda Ban Amanda Ban Colleague at Cadence Design SystemsHaidian District, Beijing, China, China View →
2 education records

Peter King education

Master'S Degree, Electronic Engineering

University Of Limerick

Designed and tested LIN block entirely in verilog RTL. This was connected to an 8051 core using an APB bus and tested using an FPGA. The.

FAQ

Frequently asked questions about Peter King

Quick answers generated from the profile data available on this page.

What company does Peter King work for?

Peter King works for Cadence Design Systems.

What is Peter King's role at Cadence Design Systems?

Peter King is listed as Principal Engineer at CreVinn Teoranta at Cadence Design Systems.

What is Peter King's email address?

AeroLeads has found 2 work email signals at @crevinn.com for Peter King at Cadence Design Systems.

Where is Peter King based?

Peter King is based in Ireland, Ireland, Ireland while working with Cadence Design Systems.

What companies has Peter King worked for?

Peter King has worked for Cadence Design Systems, Crevinn Teoranta, Pei-Csrc, University Of Toronto, Ece Department, and Xilinx.

Who are Peter King's colleagues at Cadence Design Systems?

Peter King's colleagues at Cadence Design Systems include Lola Gotlin, Cpa, Mba, Chaoxian Qi, Meera Ganesh, Asvin-Ray Amalanayagam, and Subitsha Athinarayanan.

How can I contact Peter King?

You can use AeroLeads to view verified contact signals for Peter King at Cadence Design Systems, including work email, phone, and LinkedIn data when available.

What schools did Peter King attend?

Peter King holds Master'S Degree, Electronic Engineering from University Of Limerick.

What skills is Peter King known for?

Peter King is listed with skills including Verilog, Asic, Fpga, Soc, Tcl, Static Timing Analysis, Microprocessors, and Hardware.

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