Phil Cayton Email & Phone Number

Phil Cayton is a Principal Engineer at Intel, where he leads research and development in Composable Disaggregated Infrastructures (CDI), HPC fabrics, and local and remote storage. He has over 25 years’ experience in architecture and software design, holds 21+ patents, has 9+ published technical articles, and has presented at many, many conferences.Phil currently serves as Co-Chair of the NVMe Consortium Boot Task Group, Vice Chair of the OpenFabrics Alliance (OFA), Co-Chair of the Ultra Ethernet Consortium (UEC) Storage Work Group, Director on the Board of the OFA representing Intel, and OFA Marketing Working Group Co-Chair. He coordinates and has served as Master of Ceremonies for the annual OFA Workshop for the last 3+ years. He coordinates and sets the agenda for the NVMe Technical Working Group (frequently serving as NVMe TWG Chair). In addition, he serves as a liaison in roles between the OFA, SNIA, DMTF, CXL, and UEC, and is often requested to author and negotiate agreements between industry associations and serve on Technical Program Committees for industry conferences.He is involved with, has worked on, and has influenced several industry standards, including the NVMe specifications, SNIA Swordfish, and the OFA Sunfish CDI framework: He was one of the original architects and designers of NVMe-over-Fabrics, wrote the original NVMe-oF driver stack and NVMe/RDMA transport, is a principal author of the NVMe Boot spec, and helped architect the open-source prototype of booting over NVMe/TCP.He is a lead architect of Sunfish, developing an open-ecosystem technology & vendor agnostic framework for true composable disaggregated server infrastructure using technology agnostic hardware agents.He is a lead architect developing the SNIA Swordfish Storage Management specification and associated profiles and prototypes.Phil's current technical interests include HPC ecosystem, orchestration, and infrastructure including NVM manageability, remote memory, and composable open fabric management framework projects to enable hardware agnostic scalable manageability and composability of disaggregated datacenter infrastructures.He has been involved in InfiniBand at, and since, its inception and led Xeon-PHI and open fabric enterprise network stack development, dynamic data center energy efficiency R&D, server autonomics R&D, HPC composable infrastructure R&D, mobile-device multi-radio interference mitigation projects, mobile augmented reality, sensor-enhanced personal medical monitoring projects, and network driver development activities.

Listed skills include System Architecture, Device Drivers, Operating Systems, Computer Architecture, and 26 others.