Pedro Marques Email & Phone Number

Aveiro, Portugal

- Digital hardware design based on FPGA.- Developing next generation PONs (Passive Optical Networks).- Experience with EDA tools from Xilinx, Intel/Altera andMentorGraphics.

Aveiro Area, Portugal

Researcher for the "Mobilizador 5G" project under the Portugal 2020 program. Responsible for the development of a 4G/5G Radio Unit based on FPGA/SoC and Software Defined Radio platforms.- This include the full spectrum of activities, from specification of the functional requirements and verification strategy, design decomposition, defining the optimal FPGA architecture, detailed design (Verilog/VHDL), functional verification through simulation, implementation and verification on its target platform.- Development and implementation of 10 Gbit Ethernet links over optical fiber as a Radio over Ethernet fronthaul interface targeting novel fronthaul splitting points for 4G/5G RANs.- System integration with RF front-ends based on Software Defined Radio (SDR) platforms from Analog Devices.- Deployment of 4G/5G Radio Access Networks based on the OpenAirInterface framework.- Knowledge of 3GPP architectures.

Aveiro Area, Portugal

Researcher for the SELFNET and SLICENET projects under the Horizon 2020 program. - Responsible for the deployment, maintenance and integration of a 4G LTE Radio Access Network infrastructure based in the OpenAirInterface and Mosaic5G frameworks with support for network slicing.- Collaborating in an international environment with project partners on system integration.- Experience with Virtual Machines, Linux and networking.