Jonathan Craft Email & Phone Number

Electrical engineer with substantial experience in digital verification work on large ASIC & SoC designs as well as RTL design experience targeting both ASICs and FPGAs. Expertise in both low-level Fibre Channel and serial ATA protocols as well as extensive experience developing verification methodologies and environments.As a field applications engineer with Siemens EDA, works with customers throughout the United States to help them improve the quality of their design and verification approach through the application of advanced software and methodologies. Specializes in UVM, verification management and automation, simulation performance and general methodology consulting. Key developer of the UVM Framework. Specialties: UVM, UVM Framework, metrics driven verification, scripting and automation of the verification process. Digital hardware design & verification, high-speed serial protocols.

Listed skills include Verilog, Rtl Design, Asic, Fpga, and 34 others.

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  University Of Wyoming

  Electrical Engineering