Invented numerous features in AI CGRA SOC & system to support multi-tenancy, virtualization, provisioning, collective communication, model & data parallel, low latency inference and distributed training.Recruited & built 40+ engineers’ team with AI/ML, OS, networking, openBMC, and tools expertise from scratch.Architected & delivered industry standard ML/AI training/inference software with day-0 maturity to early customers.Drove all aspects of end-to-end software development including software releases and QA with monthly milestones.De-risked silicon by delivering end-to-end software before tape-out. Successfully powered-on multiple chips/systems in record (< 1hr) time.Managed relationships and worked closely with partners/customers on product training and usage.

Architected and delivered a common AWS switch software framework to support multiple ASIC vendors.

Pioneered and led design of multi-core SPARC based SmartNIC SOC (N9) targeted for network virtualization in Oracle’s Bare Metal Cloud (BMC). De-risked architecture design by porting virtual cloud network software stack and demonstrating performance & functionality on SPARC Linux in tight three months schedule. Architected N9 SOC’s efficient SW-HW interface with support for nested overlays, collection engine for network statistics for data analytics & machine learning and sophisticated performance & power management scheme with optimal core-thread mapping based on real-time work-load heuristics to satisfy system TDP requirement.Spearheaded architecture, design & development of numerous Linux projects including Open Network Install Environment (ONIE) and Network OS (NOS) with support for multiple (management, protocol, network services) isolated Docker containers for Oracle Ethernet 100G switch (ES3) platform. The software stack supported SAI/OpenNSL APIs, in-service upgrade, real-time data analytics and real-time diagnostics features. I was the main architect and a key developer for an OS, CPU, hypervisor, & fabric independent managed network services framework which resulted in 4x performance improvement for IPfwd, Firewall, NAT, Load Balancer & VPN services on ethernet switches, servers, VMs and containers.Led architecture, design and implementation of common software stack for multiple Ethernet management switches for EDR platforms with unique features like in-service software upgrade, dynamic customization, runtime diagnostic shell, auto-failover with dual flash and stack monitoring.

Spearheaded design and development of fabric software for distributed Netvisor OS with real-time analytics and network virtualization with extensive support for SDN. Implemented abstracted APIs to support common software framework across Broadcom’s Trident, Intel’s Alta switch ASICs and Xelerated network processor.Designed, developed and ported system management FPGA controller, Broadcom’s Trident, Intel’s Alta ASICs and Xelerated network processor SDKs, device drivers and L2 switching stack to x86/Solaris. Brought up multiple switch systems and created numerous (system configuration & management, dynamically runtime diagnostic shell) tools during system bring up. Deployed and supported F64 (64 ports) 10G ToR to TIBCO, Stanford and other beta customers.

Led development and porting of switch software stack with Denx Linux kernel to 10G ToR (OPUS) switch platform. Successfully brought up multiple platforms with PowerPC and 10G Fulcrum Bali/Alta switch ASICs. Routinely reviewed H/W design and helped save millions of dollars by removing complexity from H/W design.

Architected, designed and developed Netra Data Plane Software Suite (NDPS), the first C-based runtime environment for low latency, high throughput packet processing applications for multi-core/threaded SPARC systems. The stack implemented SDK, profiler, debugger, LPM/ACL search libraries, and many (IPfwd, RLP etc.) reference applications and provided 5x-6x performance improvement over traditional OS. Evangelized NDPS with Telco customers including NEC Japan, Cisco and Reliance India for proof of concepts and design wins.Devised and implemented virtualization/partitioning scheme to run two Operating Systems (Solaris & NDPS) on SPARC CPU concurrently. Implemented simple MMU & IOMMU manager and bus infrastructure with DDI interface to run existing Solaris 1G driver on bare hardware. Designed and developed character based, Solaris non-streams driver to provide low latency, reliable datagram transport on top of Remote Shared Memory (RSM). The driver provided high-availability, load-balancing and enhanced OPS performance for transferring small messages across cluster nodes.Led design and development of Unreliable Datagram (UD) based InfiniBand DLPI driver to enable IP over IB on Solaris to support Sun Cluster over IB interconnect. Designed and implemented Java Virtual Machine (JVM) using C/Java/Pico assembly for pico I/II core based Java processors. Implemented all JVM trap handlers and ported Byte Code Optimizer to JavaOS/JDK JIT framework.

Designed and implemented Open (IEEE 1275) Firmware using both Forth and C languages for PowerPC 60x based systems. Implemented PCI-ISA bridge, Super I/O controller PC87308, 3Com PCI Ethernet drivers.

Worked on the development and bringup of Open Firmware (IEEE std 1275-1994) on PowerPC 60x based systems. Implemented drivers for IBM ethernet, S3 graphics, Audio, Serial and Parallel PCI/ISA bus devices.