I am an experienced Senior Staff Engineer with a demonstrated history of working in the semiconductors industry. 23 years in analog and mixed-signal ASIC design, layout, and testing. I have spent the last 13 years designing and testing extreme-environment integrated circuits. I designed and helped bring to market the world's first -55C to +300C SRAM. I am well versed in many design tools, including Cadence mixed-signal and Mentor digital design Tools, Synopsis front-end design tools, Cadence and Tanner layout tools, and Calibre verification and extraction tools. I am also well versed in SPICE analog simulation and Verilog design and simulation. I have also designed and built test and burn-in fixtures for testing IC's to +350C and beyond. I regularly use C and Perl programming and scripting. I have experience in manufacturing, project management, quality management and product development. I earned my BSEE focused in Electrical and Computer Engineering from Brigham Young University.