Rohan Ghige Email & Phone Number

India

Pune, Maharashtra, India

Supported large scale kernel libraries towards Radar, Library processing along with examples packages. Mainly contributed to,1. Created Radar Lidar Sensor Fusion Example- Exemplified Cadence Tensilica DSP processing expertise with real world sensor fusion example- Created end-to-end optimized kernel codebase with tracking alogeithms with tiling support- Provided performance gain and algorithm expertise with memory optmizations2. Supported linear algebra library to latest Tensilica DSPs- Analyzed existing codebase based on feature set provided in ISA- Ported previous gen kernels with improved performance

Pune, Maharashtra, India

Supported several customer benchmarks to enable customers with required software to exemplify processing power and ISA support in complex algorithms. Briefly it includes,1. Exploration with Radar sensors- Captured real world sensor data to experiment Radar processing codebase with Python- Understood and implemented preliminary SFCW algorithm with showcasing output2. Exploring Neural Network in Radar domain- Explored research papers; experimented several models to understand processing and usecase- Evaluated and compared accuracy and performance of network on Cadence DSP cores3. Supported linear algebraic algorithm kernels to customers- Created sample examples for SIMO, MIMO, FFT, tracking algorithms, Kalman filtering-Handled data movement in local DRAM using DMA operations with tiling designing4. Exposure to gdb debugging- Explored different ways to debug executables in Xtensa Simulator- Devised user friendly functions to analyze memory layout, data placements, vector prints5. Exploring convolution network- Provided optimized codebase using Xtensa XNCC framework for kernels in convolutional neural networks- Analyzed memory layout and design with validating results6. Creating Jenkins regressions to test project- Created per project Jenkins regression with support of meticulous user inputs to run same regression in many combinations- Created pipelined regressions using Groovy scripts to enable parallel runs7. Support Eigen Library Cadence Tensilica DSP cores- Supported complete Eigen Library C++ template library on numerous DSP cores- Added Packetmath layer for each DSP core with intrinsics for templated vector SIMD operations- Achieved great performance improvement compared to out-of-the-box- Created whitepaper for added support for customers

Pune, Maharashtra, India

Mainly work involved around creating fully optimized code of DSP kernels on Tensilica IP DSP cores. This includes utilizing optimization concepts such SIMD programming, Vector DSP coding, VLIW packing, FLIX bundling, memory bank placements, compiler heuristics, etc. Particularly contributed to following activities:1. Creating optimized Polyroot, Eigen Value Decomposition Streaming code with BBE intrinsic- Handled several precision code using extensive use of typedefs, macros, pragmas- Created reference Matlab code to exemplify functionality- Achieved marvelous perf improvement w.r.t. packed implementation2. Understanding large functionality test driver framework- Understood nested makefile based functionality test framework- Improvised framework to create kernel level category testing to reduce testing time3. Optimization of Matrix Decomposition algorithms- Referred several IEEE papers to get design SIMD friendly kernel code- Used special ISA instruction to get improved performance numbers4. Development of Neural Network Library to support various CNN, RNN, LSTM layers & kernels- Developed optimized kernels supporting basic convolution layer along side of several activation kernels- Supported different precision of fixed point 16b, 32b, asym8, and floating point 32b- Validated accuracy, functionality and performance for different usecases- Devised scheme to maintain future portability using innovative use of macros5. Exploring Radar and Lidar sensor processing, tracking algorithms- Implemented optimized solution for DBSCAN, Kalman Filtering, track management algorithms PDAF, JPDAF- Explored FMCW radar processing chain

Pune Area, India

Internet of Things (IoT), FreeRTOS, IAR Systems

Master Of Technology (M.Tech.), Communication & Signal Processing

Bachelor Of Technology (B.Tech.), Electronics And Telecommunication Engineering

Activities and Societies: Purushottam Karandak, Firodiya, Mashal Dance, Regatta