Roy Tseng
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Roy Tseng Email & Phone Number

Memory Circuit Design Intern at Broadcom
Location: Goleta, California, United States 5 work roles 2 schools
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✓ Verified July 2026 3 data sources Profile completeness 86%

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Current company
Role
Memory Circuit Design Intern
Location
Goleta, California, United States
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Who is Roy Tseng? Overview

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Roy Tseng is listed as Memory Circuit Design Intern at Broadcom, a with 21164 employees, based in Goleta, California, United States. AeroLeads shows a matched LinkedIn profile for Roy Tseng.

Roy Tseng previously worked as Control Hardware Development Fall Part-Time Internship at Rockwell Automation and Control Hardware Development Intern at Rockwell Automation. Roy Tseng holds Bachelor Of Science - Bs, Electrical Engineering, Junior from Uc Santa Barbara.

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Broadcom

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Profile bio

About Roy Tseng

Hey! I am senior undergraduate student studying electrical engineering at the University of California, Santa Barbara. My current interests include digital and analog IC design and probabilistic computing. I am passionate about learning and always looking to develop my intuition in fields that I have interest in.

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Broadcom
Broadcom
Memory Circuit Design Intern
Irvine, CA, US
Employees
21164
AeroLeads page
5 roles

Roy Tseng work experience

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Memory Circuit Design Intern

Irvine, Ca, Us

Control Hardware Development Fall Part-Time Internship

Current

Remote

Sep 2024 - Present

Control Hardware Development Intern

Mequon, Wisconsin, United States

PCBA Design- Designed schematics for numerous isolator board in Xpedition Designer to provide a touch safe environment between high (480V/600V) and low (5V/3.3V) voltage for internal development- Utilized tools of schematic capture to ensure fault tolerant design practices - Usage of common electrical bus interfaces (CAN, I2C, SPI, Ethernet, RS232/422, RS485, USB)- Defined layer stack up and constraint manager for in Xpedition Layout- Collaborated with layout engineers to place components and route nets, pushing boards to manufacturingTesting and Verification- Worked with power engineers from Analog Devices to test custom power supply boards intended to power auxiliary communication cards such as Ethernet and Profibus- Formalized testing procedure and demonstrated a high level of competency with lab equipment -- including benchtop power supplies, oscilloscopes, DMM, and electronic loads- Tested, verified, and debugged switched mode power supply capabilities by looking at output voltage and voltage ripple waveforms- Worked with technicians to replace problematic components and reduced thermal temperature readings to meet derating requirementsResiliency Kaizen- Contributed to efforts surrounding part resiliency to proactively avoid supplier issue in low voltage drives- Evaluated electrical characteristics of various different devices from passive components to complex ICs to find alternate parts- Devised a strategy on how to best ensure part resiliency and estimated time to change based on potential board spins, and functional/certification (UL) testing

Jun 2024 - Sep 2024

Research Assistant

Current
Opus Lab

University Of California Santa Barbara, California, United States

Our lab is focused on designing and creating efficient hardware systems to meet the growing computational needs of Machine Learning and Artificial Intelligence. We pursue a Physics-to-Systems approach where we combine algorithmic understanding with tailored hardware and architectures. We try to map unique features of emerging materials to the needs of algorithms and applications to build natural and energy-efficient computing systems. Our research interests lie at the intersection of physics, computer science and electrical engineering. We believe that such an interdisciplinary approach connecting architectures and algorithms to materials and devices is essential in the new era of electronics driven by domain-specific hardware. This is in contrast to Moore’s Law-driven era that has centered around a single device, the field-effect transistor. The new era of electronics calls for a new kind of scientist who needs to be deep in one field but also broad enough to be able to make connections to related disciplines across the computing stack.Currently I am working on p-computing development and combinatorial optimization through the implementation of Field Programable Gate Arrays (FPGAs).

Jan 2024 - Present

Coding Instructor

Newport Beach, California, United States

At Code Ninjas, I worked with students of varying ages with their intro and intermediate understanding of JavaScript through an interactive program. In addition, through collaboration along with other instructors, I lead independent camps that focused on teaching topics such as 3D Printing and CAD. I provided mentorship to students who were struggling with more technical JavaScript and STEM concepts in order to allow them to be more self-proficient when approaching logical problems.

May 2022 - Sep 2022
Team & coworkers

Colleagues at Broadcom

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2 education records

Roy Tseng education

FAQ

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What company does Roy Tseng work for?

Roy Tseng works for Broadcom.

What is Roy Tseng's role at Broadcom?

Roy Tseng is listed as Memory Circuit Design Intern at Broadcom.

Where is Roy Tseng based?

Roy Tseng is based in Goleta, California, United States while working with Broadcom.

What companies has Roy Tseng worked for?

Roy Tseng has worked for Broadcom, Rockwell Automation, Opus Lab, and Code Ninjas.

Who are Roy Tseng's colleagues at Broadcom?

Roy Tseng's colleagues at Broadcom include Carlton Swartzendruber, Jorge Gudino, Mario R. Martin, Lssyb, Lbc, Lssgb, Clare Ortega, and Vitor Lacerda.

How can I contact Roy Tseng?

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What schools did Roy Tseng attend?

Roy Tseng holds Bachelor Of Science - Bs, Electrical Engineering, Junior from Uc Santa Barbara.

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